llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-powerpc Author: None (llvmbot) <details> <summary>Changes</summary> Backport f1252f539ca203a979d61b616186e9be9d612f96 Requested by: @<!-- -->nikic --- Full diff: https://github.com/llvm/llvm-project/pull/128539.diff 2 Files Affected: - (modified) llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp (+8-5) - (added) llvm/test/MC/PowerPC/case-insensitive-regs.s (+11) ``````````diff diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index dc75814b9796b..47e7aa8785e69 100644 --- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -1320,7 +1320,10 @@ MCRegister PPCAsmParser::matchRegisterName(int64_t &IntVal) { if (!getParser().getTok().is(AsmToken::Identifier)) return MCRegister(); - StringRef Name = getParser().getTok().getString(); + // MatchRegisterName() expects lower-case registers, but we want to support + // case-insensitive spelling. + std::string NameBuf = getParser().getTok().getString().lower(); + StringRef Name(NameBuf); MCRegister RegNo = MatchRegisterName(Name); if (!RegNo) return RegNo; @@ -1329,15 +1332,15 @@ MCRegister PPCAsmParser::matchRegisterName(int64_t &IntVal) { // MatchRegisterName doesn't seem to have special handling for 64bit vs 32bit // register types. - if (Name.equals_insensitive("lr")) { + if (Name == "lr") { RegNo = isPPC64() ? PPC::LR8 : PPC::LR; IntVal = 8; - } else if (Name.equals_insensitive("ctr")) { + } else if (Name == "ctr") { RegNo = isPPC64() ? PPC::CTR8 : PPC::CTR; IntVal = 9; - } else if (Name.equals_insensitive("vrsave")) + } else if (Name == "vrsave") IntVal = 256; - else if (Name.starts_with_insensitive("r")) + else if (Name.starts_with("r")) RegNo = isPPC64() ? XRegs[IntVal] : RRegs[IntVal]; getParser().Lex(); diff --git a/llvm/test/MC/PowerPC/case-insensitive-regs.s b/llvm/test/MC/PowerPC/case-insensitive-regs.s new file mode 100644 index 0000000000000..f20a590318504 --- /dev/null +++ b/llvm/test/MC/PowerPC/case-insensitive-regs.s @@ -0,0 +1,11 @@ +# RUN: llvm-mc -triple powerpc64le-unknown-unknown %s 2>&1 | FileCheck %s + +# Test that upper case registers are accepted. + +# CHECK-LABEL: test: +# CHECK-NEXT: ld 1, 0(3) +# CHECK-NEXT: blr + +test: + ld %R1, 0(%R3) + blr `````````` </details> https://github.com/llvm/llvm-project/pull/128539 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
