https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130067
>From 02a9dbc736992683f7e1351467de1a9b07ea3a4f Mon Sep 17 00:00:00 2001 From: Akshat Oke <akshat....@amd.com> Date: Thu, 6 Mar 2025 06:56:04 +0000 Subject: [PATCH] [CodeGen][NPM] Port BranchRelaxation to NPM This completes the PreEmitPasses --- llvm/include/llvm/CodeGen/BranchRelaxation.h | 25 +++++++++++++++ llvm/include/llvm/InitializePasses.h | 2 +- .../llvm/Passes/MachinePassRegistry.def | 1 + llvm/lib/CodeGen/BranchRelaxation.cpp | 31 ++++++++++++++----- llvm/lib/CodeGen/CodeGen.cpp | 2 +- llvm/lib/Passes/PassBuilder.cpp | 1 + .../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 3 +- .../AArch64/branch-relax-block-size.mir | 1 + .../AArch64/branch-relax-cross-section.mir | 2 ++ .../AMDGPU/branch-relax-no-terminators.mir | 1 + 10 files changed, 59 insertions(+), 10 deletions(-) create mode 100644 llvm/include/llvm/CodeGen/BranchRelaxation.h diff --git a/llvm/include/llvm/CodeGen/BranchRelaxation.h b/llvm/include/llvm/CodeGen/BranchRelaxation.h new file mode 100644 index 0000000000000..2007cf05b3aa1 --- /dev/null +++ b/llvm/include/llvm/CodeGen/BranchRelaxation.h @@ -0,0 +1,25 @@ +//===- llvm/CodeGen/BranchRelaxation.h --------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CODEGEN_BRANCHRELAXATION_H +#define LLVM_CODEGEN_BRANCHRELAXATION_H + +#include "llvm/CodeGen/MachinePassManager.h" + +namespace llvm { + +class BranchRelaxationPass : public PassInfoMixin<BranchRelaxationPass> { +public: + PreservedAnalyses run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM); + static bool isRequired() { return true; } +}; + +} // namespace llvm + +#endif // LLVM_CODEGEN_BRANCHRELAXATION_H diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h index a3fd97ee99f3b..e5bffde815117 100644 --- a/llvm/include/llvm/InitializePasses.h +++ b/llvm/include/llvm/InitializePasses.h @@ -61,7 +61,7 @@ void initializeBasicAAWrapperPassPass(PassRegistry &); void initializeBlockFrequencyInfoWrapperPassPass(PassRegistry &); void initializeBranchFolderPassPass(PassRegistry &); void initializeBranchProbabilityInfoWrapperPassPass(PassRegistry &); -void initializeBranchRelaxationPass(PassRegistry &); +void initializeBranchRelaxationLegacyPass(PassRegistry &); void initializeBreakCriticalEdgesPass(PassRegistry &); void initializeBreakFalseDepsPass(PassRegistry &); void initializeCanonicalizeFreezeInLoopsPass(PassRegistry &); diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def index 285ad9601c6ff..9300f6935aa90 100644 --- a/llvm/include/llvm/Passes/MachinePassRegistry.def +++ b/llvm/include/llvm/Passes/MachinePassRegistry.def @@ -138,6 +138,7 @@ MACHINE_FUNCTION_ANALYSIS("virtregmap", VirtRegMapAnalysis()) #define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS) #endif MACHINE_FUNCTION_PASS("block-placement-stats", MachineBlockPlacementStatsPass()) +MACHINE_FUNCTION_PASS("branch-relaxation", BranchRelaxationPass()) MACHINE_FUNCTION_PASS("dead-mi-elimination", DeadMachineInstructionElimPass()) MACHINE_FUNCTION_PASS("early-ifcvt", EarlyIfConverterPass()) MACHINE_FUNCTION_PASS("early-machinelicm", EarlyMachineLICMPass()) diff --git a/llvm/lib/CodeGen/BranchRelaxation.cpp b/llvm/lib/CodeGen/BranchRelaxation.cpp index a762aab43ddd2..134ca59808c27 100644 --- a/llvm/lib/CodeGen/BranchRelaxation.cpp +++ b/llvm/lib/CodeGen/BranchRelaxation.cpp @@ -6,6 +6,7 @@ // //===----------------------------------------------------------------------===// +#include "llvm/CodeGen/BranchRelaxation.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" #include "llvm/CodeGen/LivePhysRegs.h" @@ -44,7 +45,7 @@ STATISTIC(NumUnconditionalRelaxed, "Number of unconditional branches relaxed"); namespace { -class BranchRelaxation : public MachineFunctionPass { +class BranchRelaxation { /// BasicBlockInfo - Information about the offset and size of a single /// basic block. struct BasicBlockInfo { @@ -115,23 +116,31 @@ class BranchRelaxation : public MachineFunctionPass { void dumpBBs(); void verify(); +public: + bool run(MachineFunction &MF); +}; + +class BranchRelaxationLegacy : public MachineFunctionPass { public: static char ID; - BranchRelaxation() : MachineFunctionPass(ID) {} + BranchRelaxationLegacy() : MachineFunctionPass(ID) {} - bool runOnMachineFunction(MachineFunction &MF) override; + bool runOnMachineFunction(MachineFunction &MF) override { + return BranchRelaxation().run(MF); + } StringRef getPassName() const override { return BRANCH_RELAX_NAME; } }; } // end anonymous namespace -char BranchRelaxation::ID = 0; +char BranchRelaxationLegacy::ID = 0; -char &llvm::BranchRelaxationPassID = BranchRelaxation::ID; +char &llvm::BranchRelaxationPassID = BranchRelaxationLegacy::ID; -INITIALIZE_PASS(BranchRelaxation, DEBUG_TYPE, BRANCH_RELAX_NAME, false, false) +INITIALIZE_PASS(BranchRelaxationLegacy, DEBUG_TYPE, BRANCH_RELAX_NAME, false, + false) /// verify - check BBOffsets, BBSizes, alignment of islands void BranchRelaxation::verify() { @@ -744,7 +753,15 @@ bool BranchRelaxation::relaxBranchInstructions() { return Changed; } -bool BranchRelaxation::runOnMachineFunction(MachineFunction &mf) { +PreservedAnalyses +BranchRelaxationPass::run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM) { + if (!BranchRelaxation().run(MF)) + return PreservedAnalyses::all(); + return getMachineFunctionPassPreservedAnalyses(); +} + +bool BranchRelaxation::run(MachineFunction &mf) { MF = &mf; LLVM_DEBUG(dbgs() << "***** BranchRelaxation *****\n"); diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp index 69b4d8bac94cf..80b0a4cb3283d 100644 --- a/llvm/lib/CodeGen/CodeGen.cpp +++ b/llvm/lib/CodeGen/CodeGen.cpp @@ -23,7 +23,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) { initializeBasicBlockPathCloningPass(Registry); initializeBasicBlockSectionsPass(Registry); initializeBranchFolderPassPass(Registry); - initializeBranchRelaxationPass(Registry); + initializeBranchRelaxationLegacyPass(Registry); initializeBreakFalseDepsPass(Registry); initializeCallBrPreparePass(Registry); initializeCFGuardLongjmpPass(Registry); diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp index ffc315337cac7..3de29e994422e 100644 --- a/llvm/lib/Passes/PassBuilder.cpp +++ b/llvm/lib/Passes/PassBuilder.cpp @@ -80,6 +80,7 @@ #include "llvm/CodeGen/AssignmentTrackingAnalysis.h" #include "llvm/CodeGen/AtomicExpand.h" #include "llvm/CodeGen/BasicBlockSectionsProfileReader.h" +#include "llvm/CodeGen/BranchRelaxation.h" #include "llvm/CodeGen/CallBrPrepare.h" #include "llvm/CodeGen/CodeGenPrepare.h" #include "llvm/CodeGen/ComplexDeinterleavingPass.h" diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index 9c8af88032c2b..d53620c54237d 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -65,6 +65,7 @@ #include "llvm/Analysis/KernelInfo.h" #include "llvm/Analysis/UniformityAnalysis.h" #include "llvm/CodeGen/AtomicExpand.h" +#include "llvm/CodeGen/BranchRelaxation.h" #include "llvm/CodeGen/DeadMachineInstructionElim.h" #include "llvm/CodeGen/GlobalISel/CSEInfo.h" #include "llvm/CodeGen/GlobalISel/IRTranslator.h" @@ -2185,7 +2186,7 @@ void AMDGPUCodeGenPassBuilder::addPreEmitPass(AddMachinePass &addPass) const { addPass(AMDGPUInsertDelayAluPass()); } - // TODO: addPass(BranchRelaxationPass()); + addPass(BranchRelaxationPass()); } bool AMDGPUCodeGenPassBuilder::isPassEnabled(const cl::opt<bool> &Opt, diff --git a/llvm/test/CodeGen/AArch64/branch-relax-block-size.mir b/llvm/test/CodeGen/AArch64/branch-relax-block-size.mir index 2684a550d9215..6f07d1b2a6ea5 100644 --- a/llvm/test/CodeGen/AArch64/branch-relax-block-size.mir +++ b/llvm/test/CodeGen/AArch64/branch-relax-block-size.mir @@ -1,5 +1,6 @@ # REQUIRES: asserts # RUN: llc -mtriple=aarch64--linux-gnu -run-pass=branch-relaxation -debug-only=branch-relaxation %s -o /dev/null 2>&1 | FileCheck %s +# RUN: llc -mtriple=aarch64--linux-gnu -passes=branch-relaxation -debug-only=branch-relaxation %s -o /dev/null 2>&1 | FileCheck %s # Ensure meta instructions (e.g. CFI_INSTRUCTION) don't contribute to the code # size of a basic block. diff --git a/llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir b/llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir index db88bf0044a5f..000246ad8299f 100644 --- a/llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir +++ b/llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir @@ -1,6 +1,8 @@ # RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass branch-relaxation -aarch64-b-offset-bits=64 -aarch64-tbz-offset-bits=9 -aarch64-cbz-offset-bits=9 %s -o - | FileCheck %s # RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass branch-relaxation -aarch64-tbz-offset-bits=9 -aarch64-cbz-offset-bits=9 %s -o - | FileCheck --check-prefix=INDIRECT %s +# RUN: llc -mtriple=aarch64-none-linux-gnu -passes branch-relaxation -aarch64-tbz-offset-bits=9 -aarch64-cbz-offset-bits=9 %s -o - | FileCheck --check-prefix=INDIRECT %s + --- | declare i32 @bar() declare i32 @baz() diff --git a/llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir b/llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir index e4d9fbfb17057..828594d2b57b6 100644 --- a/llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir +++ b/llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir @@ -1,5 +1,6 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -verify-machineinstrs -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a --amdgpu-s-branch-bits=5 -run-pass branch-relaxation %s -o - | FileCheck %s +# RUN: llc -verify-machineinstrs -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a --amdgpu-s-branch-bits=5 -passes=branch-relaxation %s -o - | FileCheck %s --- name: branch_no_terminators _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
