================
@@ -2432,6 +2433,29 @@ void AMDGPURegisterBankInfo::applyMappingImpl(
return;
}
+ // 16-bit operations are VALU only, but can be promoted to 32-bit SALU.
+ // Packed 16-bit operations need to be scalarized and promoted.
----------------
arsenm wrote:
I'd still expect to form not patterns canonically. I don't know why the iSA
provides it, but other patterns to make use of not
https://github.com/llvm/llvm-project/pull/131306
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