https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/131758
None >From a33a6198d338e90a066ad1408fe35a804940c511 Mon Sep 17 00:00:00 2001 From: Matt Arsenault <matthew.arsena...@amd.com> Date: Tue, 18 Mar 2025 13:34:51 +0700 Subject: [PATCH] AMDGPU: Fix attributor not handling all trap intrinsics --- llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 2 ++ .../abi-attribute-hints-undefined-behavior.ll | 6 ++++ .../AMDGPU/hsa-metadata-queue-ptr-v4.ll | 31 +++++++++++++++++++ .../AMDGPU/hsa-metadata-queue-ptr-v5.ll | 21 +++++++++++++ .../AMDGPU/implicit-kernarg-backend-usage.ll | 23 ++++++++++++++ 5 files changed, 83 insertions(+) diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp index cfff66fa07f98..0cee3c3cb5e92 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp @@ -110,6 +110,8 @@ intrinsicToAttrMask(Intrinsic::ID ID, bool &NonKernelOnly, bool &NeedsImplicit, return CodeObjectVersion >= AMDGPU::AMDHSA_COV5 ? IMPLICIT_ARG_PTR : QUEUE_PTR; case Intrinsic::trap: + case Intrinsic::debugtrap: + case Intrinsic::ubsantrap: if (SupportsGetDoorBellID) // GetDoorbellID support implemented since V4. return CodeObjectVersion >= AMDGPU::AMDHSA_COV4 ? NOT_IMPLICIT_INPUT : QUEUE_PTR; diff --git a/llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll b/llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll index b3b4959678855..29fb320bf1283 100644 --- a/llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll +++ b/llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll @@ -383,6 +383,12 @@ define void @debugtrap_requires_queue() #0 { unreachable } +; FIXME: Broken in globalisel +; define void @ubsantrap_requires_queue() #0 { +; call void @llvm.ubsantrap(i8 0) +; unreachable +; } + declare i32 @llvm.amdgcn.workitem.id.x() declare i32 @llvm.amdgcn.workitem.id.y() declare i32 @llvm.amdgcn.workitem.id.z() diff --git a/llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v4.ll b/llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v4.ll index 50bbe1d7af6c6..6776108ed8ef5 100644 --- a/llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v4.ll +++ b/llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v4.ll @@ -21,6 +21,14 @@ ; PRE-GFX9: .amdhsa_user_sgpr_queue_ptr 1 ; GFX9: .amdhsa_user_sgpr_queue_ptr 0 +; CHECK: debugtrap_requires_queue_ptr +; PRE-GFX9: .amdhsa_user_sgpr_queue_ptr 1 +; GFX9: .amdhsa_user_sgpr_queue_ptr 0 + +; CHECK: ubsantrap_requires_queue_ptr +; PRE-GFX9: .amdhsa_user_sgpr_queue_ptr 1 +; GFX9: .amdhsa_user_sgpr_queue_ptr 0 + ; CHECK: amdgcn_queue_ptr_requires_queue_ptr ; CHECK: .amdhsa_user_sgpr_queue_ptr 1 @@ -71,6 +79,28 @@ define amdgpu_kernel void @trap_requires_queue_ptr() { unreachable } +; CHECK: - .args: + +; CHECK-NOT: hidden_shared_base +; CHECK-NOT: hidden_private_base +; CHECK-NOT: hidden_queue_ptr +; CHECK-LABEL: .name: debugtrap_requires_queue_ptr +define amdgpu_kernel void @debugtrap_requires_queue_ptr() { + call void @llvm.debugtrap() + unreachable +} + +; CHECK: - .args: + +; CHECK-NOT: hidden_shared_base +; CHECK-NOT: hidden_private_base +; CHECK-NOT: hidden_queue_ptr +; CHECK-LABEL: .name: ubsantrap_requires_queue_ptr +define amdgpu_kernel void @ubsantrap_requires_queue_ptr() { + call void @llvm.ubsantrap(i8 0) + unreachable +} + ; CHECK: - .args: ; CHECK-NOT: hidden_queue_ptr ; CHECK-NOT: hidden_shared_base @@ -96,6 +126,7 @@ declare i1 @llvm.amdgcn.is.shared(ptr) declare i1 @llvm.amdgcn.is.private(ptr) declare void @llvm.trap() declare void @llvm.debugtrap() +declare void @llvm.ubsantrap(i8 immarg) !llvm.module.flags = !{!0} !0 = !{i32 1, !"amdhsa_code_object_version", i32 400} diff --git a/llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll b/llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll index 84d6480478d0a..df464027bc0da 100644 --- a/llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll +++ b/llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll @@ -60,6 +60,26 @@ define amdgpu_kernel void @trap_requires_queue_ptr() { unreachable } +; CHECK: - .args: + +; PRE-GFX9: hidden_queue_ptr +; GFX9-NOT: hidden_queue_ptr +; CHECK-LABEL: .name: debugtrap_requires_queue_ptr +define amdgpu_kernel void @debugtrap_requires_queue_ptr() { + call void @llvm.debugtrap() + unreachable +} + +; CHECK: - .args: + +; PRE-GFX9: hidden_queue_ptr +; GFX9-NOT: hidden_queue_ptr +; CHECK-LABEL: .name: ubsantrap_requires_queue_ptr +define amdgpu_kernel void @ubsantrap_requires_queue_ptr() { + call void @llvm.ubsantrap(i8 0) + unreachable +} + ; CHECK: - .args: ; CHECK: hidden_queue_ptr ; CHECK-LABEL: .name: amdgcn_queue_ptr_requires_queue_ptr @@ -84,6 +104,7 @@ declare i1 @llvm.amdgcn.is.shared(ptr) declare i1 @llvm.amdgcn.is.private(ptr) declare void @llvm.trap() declare void @llvm.debugtrap() +declare void @llvm.ubsantrap(i8 immarg) !llvm.module.flags = !{!0} !0 = !{i32 1, !"amdhsa_code_object_version", i32 500} diff --git a/llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll b/llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll index 1547ebd6ce343..b4b6bef7a7ed3 100644 --- a/llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll +++ b/llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll @@ -260,6 +260,29 @@ define amdgpu_kernel void @llvm_debugtrap() { unreachable } +define amdgpu_kernel void @llvm_ubsantrap() { +; GFX8V4-LABEL: llvm_ubsantrap: +; GFX8V4: ; %bb.0: +; GFX8V4-NEXT: s_mov_b64 s[0:1], s[6:7] +; GFX8V4-NEXT: s_trap 2 +; +; GFX8V5-LABEL: llvm_ubsantrap: +; GFX8V5: ; %bb.0: +; GFX8V5-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0xc8 +; GFX8V5-NEXT: s_waitcnt lgkmcnt(0) +; GFX8V5-NEXT: s_trap 2 +; +; GFX9V4-LABEL: llvm_ubsantrap: +; GFX9V4: ; %bb.0: +; GFX9V4-NEXT: s_trap 2 +; +; GFX9V5-LABEL: llvm_ubsantrap: +; GFX9V5: ; %bb.0: +; GFX9V5-NEXT: s_trap 2 + call void @llvm.ubsantrap(i8 0) + unreachable +} + define amdgpu_kernel void @llvm_amdgcn_queue_ptr(ptr addrspace(1) %ptr) { ; GFX8V4-LABEL: llvm_amdgcn_queue_ptr: ; GFX8V4: ; %bb.0: _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits