https://github.com/Prabhuk updated
https://github.com/llvm/llvm-project/pull/87574
>From 1d7ee612e408ee7e64e984eb08e6d7089a435d09 Mon Sep 17 00:00:00 2001
From: Necip Fazil Yildiran <ne...@google.com>
Date: Sun, 2 Feb 2025 00:58:49 +0000
Subject: [PATCH 1/6] Simplify MIR test.
Created using spr 1.3.6-beta.1
---
.../CodeGen/MIR/X86/call-site-info-typeid.mir | 21 ++++++-------------
1 file changed, 6 insertions(+), 15 deletions(-)
diff --git a/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
b/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
index 5ab797bfcc18f..a99ee50a608fb 100644
--- a/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
+++ b/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
@@ -8,11 +8,6 @@
# CHECK-NEXT: 123456789 }
--- |
- ; ModuleID = 'test.ll'
- source_filename = "test.ll"
- target datalayout =
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
- target triple = "x86_64-unknown-linux-gnu"
-
define dso_local void @foo(i8 signext %a) {
entry:
ret void
@@ -21,10 +16,10 @@
define dso_local i32 @main() {
entry:
%retval = alloca i32, align 4
- %fp = alloca void (i8)*, align 8
- store i32 0, i32* %retval, align 4
- store void (i8)* @foo, void (i8)** %fp, align 8
- %0 = load void (i8)*, void (i8)** %fp, align 8
+ %fp = alloca ptr, align 8
+ store i32 0, ptr %retval, align 4
+ store ptr @foo, ptr %fp, align 8
+ %0 = load ptr, ptr %fp, align 8
call void %0(i8 signext 97)
ret i32 0
}
@@ -42,12 +37,8 @@ body: |
name: main
tracksRegLiveness: true
stack:
- - { id: 0, name: retval, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: default, callee-saved-register: '', callee-saved-restored:
true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location:
'' }
- - { id: 1, name: fp, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: default, callee-saved-register: '', callee-saved-restored:
true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location:
'' }
+ - { id: 0, name: retval, size: 4, alignment: 4 }
+ - { id: 1, name: fp, size: 8, alignment: 8 }
callSites:
- { bb: 0, offset: 6, fwdArgRegs: [], typeId:
123456789 }
>From 86e2c9dc37170499252ed50c6bbef2931e106fbb Mon Sep 17 00:00:00 2001
From: prabhukr <prabh...@google.com>
Date: Thu, 13 Mar 2025 01:03:40 +0000
Subject: [PATCH 2/6] Add requested tests part 1.
Created using spr 1.3.6-beta.1
---
...te-info-ambiguous-indirect-call-typeid.mir | 145 ++++++++++++++++++
.../call-site-info-direct-calls-typeid.mir | 145 ++++++++++++++++++
2 files changed, 290 insertions(+)
create mode 100644
llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
create mode 100644
llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
diff --git
a/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
b/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
new file mode 100644
index 0000000000000..9d1b099cc9093
--- /dev/null
+++
b/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
@@ -0,0 +1,145 @@
+# Test MIR printer and parser for type id field in callSites. It is used
+# for propogating call site type identifiers to emit in the call graph section.
+
+# RUN: llc --call-graph-section %s -run-pass=none -o - | FileCheck %s
+# CHECK: name: main
+# CHECK: callSites:
+# CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: []
+# CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: [], typeId:
+# CHECK-NEXT: 1234567890 }
+
+--- |
+ ; Function Attrs: mustprogress noinline nounwind optnone uwtable
+ define dso_local noundef i32 @_Z3addii(i32 noundef %a, i32 noundef %b) #0
!type !6 !type !6 {
+ entry:
+ %a.addr = alloca i32, align 4
+ %b.addr = alloca i32, align 4
+ store i32 %a, ptr %a.addr, align 4
+ store i32 %b, ptr %b.addr, align 4
+ %0 = load i32, ptr %a.addr, align 4
+ %1 = load i32, ptr %b.addr, align 4
+ %add = add nsw i32 %0, %1
+ ret i32 %add
+ }
+
+ ; Function Attrs: mustprogress noinline nounwind optnone uwtable
+ define dso_local noundef i32 @_Z8multiplyii(i32 noundef %a, i32 noundef %b)
#0 !type !6 !type !6 {
+ entry:
+ %a.addr = alloca i32, align 4
+ %b.addr = alloca i32, align 4
+ store i32 %a, ptr %a.addr, align 4
+ store i32 %b, ptr %b.addr, align 4
+ %0 = load i32, ptr %a.addr, align 4
+ %1 = load i32, ptr %b.addr, align 4
+ %mul = mul nsw i32 %0, %1
+ ret i32 %mul
+ }
+
+ ; Function Attrs: mustprogress noinline nounwind optnone uwtable
+ define dso_local noundef ptr @_Z13get_operationb(i1 noundef zeroext
%is_addition) #0 !type !7 !type !7 {
+ entry:
+ %is_addition.addr = alloca i8, align 1
+ %storedv = zext i1 %is_addition to i8
+ store i8 %storedv, ptr %is_addition.addr, align 1
+ %0 = load i8, ptr %is_addition.addr, align 1
+ %loadedv = trunc i8 %0 to i1
+ br i1 %loadedv, label %cond.true, label %cond.false
+
+ cond.true: ; preds = %entry
+ br label %cond.end
+
+ cond.false: ; preds = %entry
+ br label %cond.end
+
+ cond.end: ; preds = %cond.false,
%cond.true
+ %cond = phi ptr [ @_Z3addii, %cond.true ], [ @_Z8multiplyii, %cond.false ]
+ ret ptr %cond
+ }
+
+ ; Function Attrs: mustprogress noinline norecurse optnone uwtable
+ define dso_local noundef i32 @main(i32 noundef %argc) #1 !type !8 !type !8 {
+ entry:
+ %retval = alloca i32, align 4
+ %argc.addr = alloca i32, align 4
+ %x = alloca i32, align 4
+ %y = alloca i32, align 4
+ %op = alloca ptr, align 8
+ store i32 0, ptr %retval, align 4
+ store i32 %argc, ptr %argc.addr, align 4
+ store i32 5, ptr %x, align 4
+ store i32 10, ptr %y, align 4
+ %0 = load i32, ptr %argc.addr, align 4
+ %rem = srem i32 %0, 2
+ %cmp = icmp eq i32 %rem, 0
+ %call = call noundef ptr @_Z13get_operationb(i1 noundef zeroext %cmp) [
"callee_type"(metadata !"_ZTSFPvbE.generalized") ]
+ store ptr %call, ptr %op, align 8
+ %1 = load ptr, ptr %op, align 8
+ %2 = load i32, ptr %x, align 4
+ %3 = load i32, ptr %y, align 4
+ %call1 = call noundef i32 %1(i32 noundef %2, i32 noundef %3) [
"callee_type"(metadata !"_ZTSFiiiE.generalized") ]
+ ret i32 %call1
+ }
+
+ attributes #0 = { mustprogress noinline nounwind optnone uwtable
"frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true"
"stack-protector-buffer-size"="8" "target-cpu"="x86-64"
"target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
+ attributes #1 = { mustprogress noinline norecurse optnone uwtable
"frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true"
"stack-protector-buffer-size"="8" "target-cpu"="x86-64"
"target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
+
+ !6 = !{i64 0, !"_ZTSFiiiE.generalized"}
+ !7 = !{i64 0, !"_ZTSFPvbE.generalized"}
+ !8 = !{i64 0, !"_ZTSFiiE.generalized"}
+
+...
+---
+name: main
+liveins:
+ - { reg: '$edi', virtual-reg: '%0' }
+stack:
+ - { id: 0, name: retval, size: 4 }
+ - { id: 1, name: argc.addr, size: 4 }
+ - { id: 2, name: x, size: 4 }
+ - { id: 3, name: y, size: 4 }
+ - { id: 4, name: op, size: 8 }
+callSites:
+ - { bb: 0, offset: 18, fwdArgRegs: [] }
+ - { bb: 0, offset: 29, fwdArgRegs: [], typeId:
+ 1234567890 }
+body: |
+ bb.0.entry:
+ liveins: $edi
+
+ %0:gr32 = COPY $edi
+ %1:gr32 = COPY killed %0
+ MOV32mi %stack.0.retval, 1, $noreg, 0, $noreg, 0 :: (store (s32) into
%ir.retval)
+ MOV32mr %stack.1.argc.addr, 1, $noreg, 0, $noreg, %1 :: (store (s32) into
%ir.argc.addr)
+ MOV32mi %stack.2.x, 1, $noreg, 0, $noreg, 5 :: (store (s32) into %ir.x)
+ MOV32mi %stack.3.y, 1, $noreg, 0, $noreg, 10 :: (store (s32) into %ir.y)
+ %21:gr32 = MOV32rm %stack.1.argc.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.argc.addr)
+ %19:gr32 = MOV32ri 2
+ $eax = COPY %21
+ CDQ implicit-def $eax, implicit-def $edx, implicit $eax
+ IDIV32r %19, implicit-def $eax, implicit-def $edx, implicit-def $eflags,
implicit $eax, implicit $edx
+ %20:gr32 = COPY $edx
+ CMP32ri %20, 0, implicit-def $eflags
+ %15:gr8 = SETCCr 4, implicit $eflags
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead
$eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %12:gr32 = MOVZX32rr8 %15
+ %13:gr32 = AND32ri %12, 1, implicit-def dead $eflags
+ $edi = COPY %13
+ CALL64pcrel32 @_Z13get_operationb, csr_64, implicit $rsp, implicit $ssp,
implicit $edi, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags,
implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %14:gr64 = COPY $rax
+ %10:gr64 = COPY %14
+ MOV64mr %stack.4.op, 1, $noreg, 0, $noreg, %10 :: (store (s64) into %ir.op)
+ %9:gr64 = MOV64rm %stack.4.op, 1, $noreg, 0, $noreg :: (load (s64) from
%ir.op)
+ %8:gr32 = MOV32rm %stack.2.x, 1, $noreg, 0, $noreg :: (load (s32) from
%ir.x)
+ %7:gr32 = MOV32rm %stack.3.y, 1, $noreg, 0, $noreg :: (load (s32) from
%ir.y)
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead
$eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ $edi = COPY %8
+ $esi = COPY %7
+ CALL64r %9, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit
$esi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags,
implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %6:gr32 = COPY $eax
+ %2:gr32 = COPY %6
+ $eax = COPY %2
+ RET64 implicit $eax
+
+...
diff --git a/llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
b/llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
new file mode 100644
index 0000000000000..564cc8268e5cd
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
@@ -0,0 +1,145 @@
+# Test MIR printer and parser to NOT have `typeId` field in callSites.
`typeId` is used
+# for propogating call site type identifiers to emit in the call graph section
for
+# indirect targets only. This test do not contain any indirect targets.
+
+# RUN: llc --call-graph-section %s -run-pass=none -o - | FileCheck %s
+# CHECK-NOT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: [], typeId:
+# CHECK: name: _Z3barii
+# CHECK: callSites:
+# CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: []
+# CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: []
+# CHECK: name: _Z3fooii
+# CHECK: callSites:
+# CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: []
+
+--- |
+ ; Function Attrs: mustprogress noinline nounwind optnone uwtable
+ define dso_local noundef i32 @_Z4fizzii(i32 noundef %x, i32 noundef %y) #0
!type !6 !type !6 {
+ entry:
+ %x.addr = alloca i32, align 4
+ %y.addr = alloca i32, align 4
+ store i32 %x, ptr %x.addr, align 4
+ store i32 %y, ptr %y.addr, align 4
+ %0 = load i32, ptr %x.addr, align 4
+ %1 = load i32, ptr %y.addr, align 4
+ %add = add nsw i32 %0, %1
+ ret i32 %add
+ }
+
+ ; Function Attrs: mustprogress noinline nounwind optnone uwtable
+ define dso_local noundef i32 @_Z4buzzii(i32 noundef %x, i32 noundef %y) #0
!type !6 !type !6 {
+ entry:
+ %x.addr = alloca i32, align 4
+ %y.addr = alloca i32, align 4
+ store i32 %x, ptr %x.addr, align 4
+ store i32 %y, ptr %y.addr, align 4
+ %0 = load i32, ptr %x.addr, align 4
+ %1 = load i32, ptr %y.addr, align 4
+ %mul = mul nsw i32 %0, %1
+ ret i32 %mul
+ }
+
+ ; Function Attrs: mustprogress noinline nounwind optnone uwtable
+ define dso_local noundef i32 @_Z3barii(i32 noundef %x, i32 noundef %y) #0
!type !6 !type !6 {
+ entry:
+ %x.addr = alloca i32, align 4
+ %y.addr = alloca i32, align 4
+ store i32 %x, ptr %x.addr, align 4
+ store i32 %y, ptr %y.addr, align 4
+ %0 = load i32, ptr %x.addr, align 4
+ %1 = load i32, ptr %y.addr, align 4
+ %call = call noundef i32 @_Z4buzzii(i32 noundef %0, i32 noundef %1) [
"callee_type"(metadata !"_ZTSFiiiE.generalized") ]
+ %2 = load i32, ptr %x.addr, align 4
+ %3 = load i32, ptr %y.addr, align 4
+ %call1 = call noundef i32 @_Z4fizzii(i32 noundef %2, i32 noundef %3) [
"callee_type"(metadata !"_ZTSFiiiE.generalized") ]
+ %sub = sub nsw i32 %call, %call1
+ ret i32 %sub
+ }
+
+ ; Function Attrs: mustprogress noinline nounwind optnone uwtable
+ define dso_local noundef i32 @_Z3fooii(i32 noundef %x, i32 noundef %y) #0
!type !6 !type !6 {
+ entry:
+ %x.addr = alloca i32, align 4
+ %y.addr = alloca i32, align 4
+ store i32 %x, ptr %x.addr, align 4
+ store i32 %y, ptr %y.addr, align 4
+ %0 = load i32, ptr %x.addr, align 4
+ %1 = load i32, ptr %y.addr, align 4
+ %call = call noundef i32 @_Z3barii(i32 noundef %0, i32 noundef %1) [
"callee_type"(metadata !"_ZTSFiiiE.generalized") ]
+ ret i32 %call
+ }
+
+ !6 = !{i64 0, !"_ZTSFiiiE.generalized"}
+
+...
+---
+name: _Z3barii
+stack:
+ - { id: 0, name: x.addr, size: 4 }
+ - { id: 1, name: y.addr, size: 4 }
+callSites:
+ - { bb: 0, offset: 11, fwdArgRegs: [] }
+ - { bb: 0, offset: 20, fwdArgRegs: [] }
+body: |
+ bb.0.entry:
+ liveins: $edi, $esi
+
+ %2:gr32 = COPY $esi
+ %0:gr32 = COPY $edi
+ %1:gr32 = COPY killed %0
+ %3:gr32 = COPY killed %2
+ MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %1 :: (store (s32) into
%ir.x.addr)
+ MOV32mr %stack.1.y.addr, 1, $noreg, 0, $noreg, %3 :: (store (s32) into
%ir.y.addr)
+ %17:gr32 = MOV32rm %stack.0.x.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.x.addr)
+ %16:gr32 = MOV32rm %stack.1.y.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.y.addr)
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead
$eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ $edi = COPY %17
+ $esi = COPY %16
+ CALL64pcrel32 @_Z4buzzii, csr_64, implicit $rsp, implicit $ssp, implicit
$edi, implicit $esi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags,
implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %15:gr32 = COPY $eax
+ %5:gr32 = COPY %15
+ %12:gr32 = MOV32rm %stack.0.x.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.x.addr)
+ %11:gr32 = MOV32rm %stack.1.y.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.y.addr)
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead
$eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ $edi = COPY %12
+ $esi = COPY %11
+ CALL64pcrel32 @_Z4fizzii, csr_64, implicit $rsp, implicit $ssp, implicit
$edi, implicit $esi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags,
implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %10:gr32 = COPY $eax
+ %6:gr32 = COPY %10
+ %7:gr32 = SUB32rr %5, %6, implicit-def $eflags
+ $eax = COPY %7
+ RET64 implicit $eax
+
+...
+---
+name: _Z3fooii
+stack:
+ - { id: 0, name: x.addr, size: 4 }
+ - { id: 1, name: y.addr, size: 4 }
+callSites:
+ - { bb: 0, offset: 11, fwdArgRegs: [] }
+body: |
+ bb.0.entry:
+ liveins: $edi, $esi
+
+ %2:gr32 = COPY $esi
+ %0:gr32 = COPY $edi
+ %1:gr32 = COPY killed %0
+ %3:gr32 = COPY killed %2
+ MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %1 :: (store (s32) into
%ir.x.addr)
+ MOV32mr %stack.1.y.addr, 1, $noreg, 0, $noreg, %3 :: (store (s32) into
%ir.y.addr)
+ %9:gr32 = MOV32rm %stack.0.x.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.x.addr)
+ %8:gr32 = MOV32rm %stack.1.y.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.y.addr)
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead
$eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ $edi = COPY %9
+ $esi = COPY %8
+ CALL64pcrel32 @_Z3barii, csr_64, implicit $rsp, implicit $ssp, implicit
$edi, implicit $esi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags,
implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ %7:gr32 = COPY $eax
+ %4:gr32 = COPY %7
+ $eax = COPY %4
+ RET64 implicit $eax
+
+...
>From 941dde570c6de52c41101a06c8ccb28f377021ee Mon Sep 17 00:00:00 2001
From: prabhukr <prabh...@google.com>
Date: Thu, 13 Mar 2025 01:21:26 +0000
Subject: [PATCH 3/6] Update comments in tests.
Created using spr 1.3.6-beta.1
---
.../X86/call-site-info-ambiguous-indirect-call-typeid.mir | 3 ---
.../CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir | 6 +++---
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git
a/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
b/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
index 9d1b099cc9093..40fb1ddbbc004 100644
---
a/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
+++
b/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
@@ -80,9 +80,6 @@
ret i32 %call1
}
- attributes #0 = { mustprogress noinline nounwind optnone uwtable
"frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true"
"stack-protector-buffer-size"="8" "target-cpu"="x86-64"
"target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
- attributes #1 = { mustprogress noinline norecurse optnone uwtable
"frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true"
"stack-protector-buffer-size"="8" "target-cpu"="x86-64"
"target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
-
!6 = !{i64 0, !"_ZTSFiiiE.generalized"}
!7 = !{i64 0, !"_ZTSFPvbE.generalized"}
!8 = !{i64 0, !"_ZTSFiiE.generalized"}
diff --git a/llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
b/llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
index 564cc8268e5cd..528ddb5908d0d 100644
--- a/llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
+++ b/llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
@@ -1,6 +1,6 @@
-# Test MIR printer and parser to NOT have `typeId` field in callSites.
`typeId` is used
-# for propogating call site type identifiers to emit in the call graph section
for
-# indirect targets only. This test do not contain any indirect targets.
+# Test MIR printer and parser to NOT have `typeId` field in callSites.
+# `typeId` is used for propogating call site type identifiers for
+# indirect targets only. This test does not contain any indirect targets.
# RUN: llc --call-graph-section %s -run-pass=none -o - | FileCheck %s
# CHECK-NOT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: [], typeId:
>From 431fafc60347e65219f1cccd0cff474432c928ed Mon Sep 17 00:00:00 2001
From: prabhukr <prabh...@google.com>
Date: Sat, 15 Mar 2025 01:09:45 +0000
Subject: [PATCH 4/6] Clean up test files.
Created using spr 1.3.6-beta.1
---
...te-info-ambiguous-indirect-call-typeid.mir | 107 +++++-------------
.../call-site-info-direct-calls-typeid.mir | 107 +++++-------------
.../CodeGen/MIR/X86/call-site-info-typeid.mir | 31 +----
3 files changed, 60 insertions(+), 185 deletions(-)
diff --git
a/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
b/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
index 40fb1ddbbc004..18aad1813339a 100644
---
a/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
+++
b/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
@@ -9,55 +9,48 @@
# CHECK-NEXT: 1234567890 }
--- |
- ; Function Attrs: mustprogress noinline nounwind optnone uwtable
- define dso_local noundef i32 @_Z3addii(i32 noundef %a, i32 noundef %b) #0
!type !6 !type !6 {
+ define dso_local noundef i32 @_Z3addii(i32 noundef %a, i32 noundef %b) !type
!0 !type !0 {
entry:
%a.addr = alloca i32, align 4
%b.addr = alloca i32, align 4
store i32 %a, ptr %a.addr, align 4
store i32 %b, ptr %b.addr, align 4
- %0 = load i32, ptr %a.addr, align 4
- %1 = load i32, ptr %b.addr, align 4
- %add = add nsw i32 %0, %1
+ %a_val = load i32, ptr %a.addr, align 4
+ %b_val = load i32, ptr %b.addr, align 4
+ %add = add nsw i32 %a_val, %b_val
ret i32 %add
}
- ; Function Attrs: mustprogress noinline nounwind optnone uwtable
- define dso_local noundef i32 @_Z8multiplyii(i32 noundef %a, i32 noundef %b)
#0 !type !6 !type !6 {
+ define dso_local noundef i32 @_Z8multiplyii(i32 noundef %a, i32 noundef %b)
!type !0 !type !0 {
entry:
%a.addr = alloca i32, align 4
%b.addr = alloca i32, align 4
store i32 %a, ptr %a.addr, align 4
store i32 %b, ptr %b.addr, align 4
- %0 = load i32, ptr %a.addr, align 4
- %1 = load i32, ptr %b.addr, align 4
- %mul = mul nsw i32 %0, %1
+ %a_val = load i32, ptr %a.addr, align 4
+ %b_val = load i32, ptr %b.addr, align 4
+ %mul = mul nsw i32 %a_val, %b_val
ret i32 %mul
}
- ; Function Attrs: mustprogress noinline nounwind optnone uwtable
- define dso_local noundef ptr @_Z13get_operationb(i1 noundef zeroext
%is_addition) #0 !type !7 !type !7 {
+ define dso_local noundef ptr @_Z13get_operationb(i1 noundef zeroext
%is_addition) !type !1 !type !1 {
entry:
%is_addition.addr = alloca i8, align 1
%storedv = zext i1 %is_addition to i8
store i8 %storedv, ptr %is_addition.addr, align 1
- %0 = load i8, ptr %is_addition.addr, align 1
- %loadedv = trunc i8 %0 to i1
- br i1 %loadedv, label %cond.true, label %cond.false
-
- cond.true: ; preds = %entry
- br label %cond.end
+ %is_addition_val = load i8, ptr %is_addition.addr, align 1
+ %loadedv = trunc i8 %is_addition_val to i1
+ br i1 %loadedv, label %cond.end, label %cond.false
cond.false: ; preds = %entry
br label %cond.end
- cond.end: ; preds = %cond.false,
%cond.true
- %cond = phi ptr [ @_Z3addii, %cond.true ], [ @_Z8multiplyii, %cond.false ]
+ cond.end: ; preds = %cond.false,
%entry
+ %cond = phi ptr [ @_Z8multiplyii, %cond.false ], [ @_Z3addii, %entry ]
ret ptr %cond
}
- ; Function Attrs: mustprogress noinline norecurse optnone uwtable
- define dso_local noundef i32 @main(i32 noundef %argc) #1 !type !8 !type !8 {
+ define dso_local noundef i32 @main(i32 noundef %argc) !type !2 !type !2 {
entry:
%retval = alloca i32, align 4
%argc.addr = alloca i32, align 4
@@ -68,75 +61,33 @@
store i32 %argc, ptr %argc.addr, align 4
store i32 5, ptr %x, align 4
store i32 10, ptr %y, align 4
- %0 = load i32, ptr %argc.addr, align 4
- %rem = srem i32 %0, 2
+ %argc_val = load i32, ptr %argc.addr, align 4
+ %rem = srem i32 %argc_val, 2
%cmp = icmp eq i32 %rem, 0
%call = call noundef ptr @_Z13get_operationb(i1 noundef zeroext %cmp) [
"callee_type"(metadata !"_ZTSFPvbE.generalized") ]
store ptr %call, ptr %op, align 8
- %1 = load ptr, ptr %op, align 8
- %2 = load i32, ptr %x, align 4
- %3 = load i32, ptr %y, align 4
- %call1 = call noundef i32 %1(i32 noundef %2, i32 noundef %3) [
"callee_type"(metadata !"_ZTSFiiiE.generalized") ]
+ %op_val = load ptr, ptr %op, align 8
+ %x_val = load i32, ptr %x, align 4
+ %y_val = load i32, ptr %y, align 4
+ %call1 = call noundef i32 %op_val(i32 noundef %x_val, i32 noundef %y_val)
[ "callee_type"(metadata !"_ZTSFiiiE.generalized") ]
ret i32 %call1
}
- !6 = !{i64 0, !"_ZTSFiiiE.generalized"}
- !7 = !{i64 0, !"_ZTSFPvbE.generalized"}
- !8 = !{i64 0, !"_ZTSFiiE.generalized"}
+ !0 = !{i64 0, !"_ZTSFiiiE.generalized"}
+ !1 = !{i64 0, !"_ZTSFPvbE.generalized"}
+ !2 = !{i64 0, !"_ZTSFiiE.generalized"}
...
---
name: main
-liveins:
- - { reg: '$edi', virtual-reg: '%0' }
-stack:
- - { id: 0, name: retval, size: 4 }
- - { id: 1, name: argc.addr, size: 4 }
- - { id: 2, name: x, size: 4 }
- - { id: 3, name: y, size: 4 }
- - { id: 4, name: op, size: 8 }
callSites:
- - { bb: 0, offset: 18, fwdArgRegs: [] }
- - { bb: 0, offset: 29, fwdArgRegs: [], typeId:
+ - { bb: 0, offset: 0, fwdArgRegs: [] }
+ - { bb: 0, offset: 2, fwdArgRegs: [], typeId:
1234567890 }
body: |
bb.0.entry:
- liveins: $edi
-
- %0:gr32 = COPY $edi
- %1:gr32 = COPY killed %0
- MOV32mi %stack.0.retval, 1, $noreg, 0, $noreg, 0 :: (store (s32) into
%ir.retval)
- MOV32mr %stack.1.argc.addr, 1, $noreg, 0, $noreg, %1 :: (store (s32) into
%ir.argc.addr)
- MOV32mi %stack.2.x, 1, $noreg, 0, $noreg, 5 :: (store (s32) into %ir.x)
- MOV32mi %stack.3.y, 1, $noreg, 0, $noreg, 10 :: (store (s32) into %ir.y)
- %21:gr32 = MOV32rm %stack.1.argc.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.argc.addr)
- %19:gr32 = MOV32ri 2
- $eax = COPY %21
- CDQ implicit-def $eax, implicit-def $edx, implicit $eax
- IDIV32r %19, implicit-def $eax, implicit-def $edx, implicit-def $eflags,
implicit $eax, implicit $edx
- %20:gr32 = COPY $edx
- CMP32ri %20, 0, implicit-def $eflags
- %15:gr8 = SETCCr 4, implicit $eflags
- ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead
$eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- %12:gr32 = MOVZX32rr8 %15
- %13:gr32 = AND32ri %12, 1, implicit-def dead $eflags
- $edi = COPY %13
- CALL64pcrel32 @_Z13get_operationb, csr_64, implicit $rsp, implicit $ssp,
implicit $edi, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
- ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags,
implicit-def dead $ssp, implicit $rsp, implicit $ssp
- %14:gr64 = COPY $rax
- %10:gr64 = COPY %14
- MOV64mr %stack.4.op, 1, $noreg, 0, $noreg, %10 :: (store (s64) into %ir.op)
- %9:gr64 = MOV64rm %stack.4.op, 1, $noreg, 0, $noreg :: (load (s64) from
%ir.op)
- %8:gr32 = MOV32rm %stack.2.x, 1, $noreg, 0, $noreg :: (load (s32) from
%ir.x)
- %7:gr32 = MOV32rm %stack.3.y, 1, $noreg, 0, $noreg :: (load (s32) from
%ir.y)
- ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead
$eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- $edi = COPY %8
- $esi = COPY %7
- CALL64r %9, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit
$esi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
- ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags,
implicit-def dead $ssp, implicit $rsp, implicit $ssp
- %6:gr32 = COPY $eax
- %2:gr32 = COPY %6
- $eax = COPY %2
- RET64 implicit $eax
+ CALL64pcrel32 @_Z13get_operationb, csr_64, implicit $rsp, implicit $ssp,
implicit $edi, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ %7:gr64 = COPY $rax
+ CALL64r %7, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit
$esi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
...
diff --git a/llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
b/llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
index 528ddb5908d0d..c94b20138da55 100644
--- a/llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
+++ b/llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
@@ -13,133 +13,78 @@
# CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: []
--- |
- ; Function Attrs: mustprogress noinline nounwind optnone uwtable
- define dso_local noundef i32 @_Z4fizzii(i32 noundef %x, i32 noundef %y) #0
!type !6 !type !6 {
+ define dso_local noundef i32 @_Z4fizzii(i32 noundef %x, i32 noundef %y)
!type !0 !type !0 {
entry:
%x.addr = alloca i32, align 4
%y.addr = alloca i32, align 4
store i32 %x, ptr %x.addr, align 4
store i32 %y, ptr %y.addr, align 4
- %0 = load i32, ptr %x.addr, align 4
- %1 = load i32, ptr %y.addr, align 4
- %add = add nsw i32 %0, %1
+ %x_val = load i32, ptr %x.addr, align 4
+ %y_val = load i32, ptr %y.addr, align 4
+ %add = add nsw i32 %x_val, %y_val
ret i32 %add
}
- ; Function Attrs: mustprogress noinline nounwind optnone uwtable
- define dso_local noundef i32 @_Z4buzzii(i32 noundef %x, i32 noundef %y) #0
!type !6 !type !6 {
+ define dso_local noundef i32 @_Z4buzzii(i32 noundef %x, i32 noundef %y)
!type !0 !type !0 {
entry:
%x.addr = alloca i32, align 4
%y.addr = alloca i32, align 4
store i32 %x, ptr %x.addr, align 4
store i32 %y, ptr %y.addr, align 4
- %0 = load i32, ptr %x.addr, align 4
- %1 = load i32, ptr %y.addr, align 4
- %mul = mul nsw i32 %0, %1
+ %x_val = load i32, ptr %x.addr, align 4
+ %y_val = load i32, ptr %y.addr, align 4
+ %mul = mul nsw i32 %x_val, %y_val
ret i32 %mul
}
- ; Function Attrs: mustprogress noinline nounwind optnone uwtable
- define dso_local noundef i32 @_Z3barii(i32 noundef %x, i32 noundef %y) #0
!type !6 !type !6 {
+ define dso_local noundef i32 @_Z3barii(i32 noundef %x, i32 noundef %y) !type
!0 !type !0 {
entry:
%x.addr = alloca i32, align 4
%y.addr = alloca i32, align 4
store i32 %x, ptr %x.addr, align 4
store i32 %y, ptr %y.addr, align 4
- %0 = load i32, ptr %x.addr, align 4
- %1 = load i32, ptr %y.addr, align 4
- %call = call noundef i32 @_Z4buzzii(i32 noundef %0, i32 noundef %1) [
"callee_type"(metadata !"_ZTSFiiiE.generalized") ]
- %2 = load i32, ptr %x.addr, align 4
- %3 = load i32, ptr %y.addr, align 4
- %call1 = call noundef i32 @_Z4fizzii(i32 noundef %2, i32 noundef %3) [
"callee_type"(metadata !"_ZTSFiiiE.generalized") ]
+ %x_val = load i32, ptr %x.addr, align 4
+ %y_val = load i32, ptr %y.addr, align 4
+ %call = call noundef i32 @_Z4buzzii(i32 noundef %x_val, i32 noundef
%y_val) [ "callee_type"(metadata !"_ZTSFiiiE.generalized") ]
+ %x_val_2 = load i32, ptr %x.addr, align 4
+ %y_val_2 = load i32, ptr %y.addr, align 4
+ %call1 = call noundef i32 @_Z4fizzii(i32 noundef %x_val_2, i32 noundef
%y_val_2) [ "callee_type"(metadata !"_ZTSFiiiE.generalized") ]
%sub = sub nsw i32 %call, %call1
ret i32 %sub
}
- ; Function Attrs: mustprogress noinline nounwind optnone uwtable
- define dso_local noundef i32 @_Z3fooii(i32 noundef %x, i32 noundef %y) #0
!type !6 !type !6 {
+ define dso_local noundef i32 @_Z3fooii(i32 noundef %x, i32 noundef %y) !type
!0 !type !0 {
entry:
%x.addr = alloca i32, align 4
%y.addr = alloca i32, align 4
store i32 %x, ptr %x.addr, align 4
store i32 %y, ptr %y.addr, align 4
- %0 = load i32, ptr %x.addr, align 4
- %1 = load i32, ptr %y.addr, align 4
- %call = call noundef i32 @_Z3barii(i32 noundef %0, i32 noundef %1) [
"callee_type"(metadata !"_ZTSFiiiE.generalized") ]
+ %x_val = load i32, ptr %x.addr, align 4
+ %y_val = load i32, ptr %y.addr, align 4
+ %call = call noundef i32 @_Z3barii(i32 noundef %x_val, i32 noundef %y_val)
[ "callee_type"(metadata !"_ZTSFiiiE.generalized") ]
ret i32 %call
- }
+ }
- !6 = !{i64 0, !"_ZTSFiiiE.generalized"}
+ !0 = !{i64 0, !"_ZTSFiiiE.generalized"}
...
---
name: _Z3barii
-stack:
- - { id: 0, name: x.addr, size: 4 }
- - { id: 1, name: y.addr, size: 4 }
callSites:
- - { bb: 0, offset: 11, fwdArgRegs: [] }
- - { bb: 0, offset: 20, fwdArgRegs: [] }
+ - { bb: 0, offset: 0, fwdArgRegs: [] }
+ - { bb: 0, offset: 1, fwdArgRegs: [] }
body: |
bb.0.entry:
- liveins: $edi, $esi
-
- %2:gr32 = COPY $esi
- %0:gr32 = COPY $edi
- %1:gr32 = COPY killed %0
- %3:gr32 = COPY killed %2
- MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %1 :: (store (s32) into
%ir.x.addr)
- MOV32mr %stack.1.y.addr, 1, $noreg, 0, $noreg, %3 :: (store (s32) into
%ir.y.addr)
- %17:gr32 = MOV32rm %stack.0.x.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.x.addr)
- %16:gr32 = MOV32rm %stack.1.y.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.y.addr)
- ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead
$eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- $edi = COPY %17
- $esi = COPY %16
- CALL64pcrel32 @_Z4buzzii, csr_64, implicit $rsp, implicit $ssp, implicit
$edi, implicit $esi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
- ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags,
implicit-def dead $ssp, implicit $rsp, implicit $ssp
- %15:gr32 = COPY $eax
- %5:gr32 = COPY %15
- %12:gr32 = MOV32rm %stack.0.x.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.x.addr)
- %11:gr32 = MOV32rm %stack.1.y.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.y.addr)
- ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead
$eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- $edi = COPY %12
- $esi = COPY %11
- CALL64pcrel32 @_Z4fizzii, csr_64, implicit $rsp, implicit $ssp, implicit
$edi, implicit $esi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
- ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags,
implicit-def dead $ssp, implicit $rsp, implicit $ssp
- %10:gr32 = COPY $eax
- %6:gr32 = COPY %10
- %7:gr32 = SUB32rr %5, %6, implicit-def $eflags
- $eax = COPY %7
- RET64 implicit $eax
+ CALL64pcrel32 @_Z4buzzii, csr_64, implicit $rsp, implicit $ssp, implicit
$edi, implicit $esi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
+ CALL64pcrel32 @_Z4fizzii, csr_64, implicit $rsp, implicit $ssp, implicit
$edi, implicit $esi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
...
---
name: _Z3fooii
-stack:
- - { id: 0, name: x.addr, size: 4 }
- - { id: 1, name: y.addr, size: 4 }
callSites:
- - { bb: 0, offset: 11, fwdArgRegs: [] }
+ - { bb: 0, offset: 0, fwdArgRegs: [] }
body: |
bb.0.entry:
- liveins: $edi, $esi
-
- %2:gr32 = COPY $esi
- %0:gr32 = COPY $edi
- %1:gr32 = COPY killed %0
- %3:gr32 = COPY killed %2
- MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %1 :: (store (s32) into
%ir.x.addr)
- MOV32mr %stack.1.y.addr, 1, $noreg, 0, $noreg, %3 :: (store (s32) into
%ir.y.addr)
- %9:gr32 = MOV32rm %stack.0.x.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.x.addr)
- %8:gr32 = MOV32rm %stack.1.y.addr, 1, $noreg, 0, $noreg :: (load (s32)
from %ir.y.addr)
- ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead
$eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- $edi = COPY %9
- $esi = COPY %8
CALL64pcrel32 @_Z3barii, csr_64, implicit $rsp, implicit $ssp, implicit
$edi, implicit $esi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
- ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags,
implicit-def dead $ssp, implicit $rsp, implicit $ssp
- %7:gr32 = COPY $eax
- %4:gr32 = COPY %7
- $eax = COPY %4
- RET64 implicit $eax
...
diff --git a/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
b/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
index a99ee50a608fb..9342c3a70ed40 100644
--- a/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
+++ b/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
@@ -19,41 +19,20 @@
%fp = alloca ptr, align 8
store i32 0, ptr %retval, align 4
store ptr @foo, ptr %fp, align 8
- %0 = load ptr, ptr %fp, align 8
- call void %0(i8 signext 97)
+ %fp_val = load ptr, ptr %fp, align 8
+ call void %fp_val(i8 signext 97)
ret i32 0
}
-...
----
-name: foo
-tracksRegLiveness: true
-body: |
- bb.0.entry:
- RET 0
-
...
---
name: main
-tracksRegLiveness: true
-stack:
- - { id: 0, name: retval, size: 4, alignment: 4 }
- - { id: 1, name: fp, size: 8, alignment: 8 }
callSites:
- - { bb: 0, offset: 6, fwdArgRegs: [], typeId:
+ - { bb: 0, offset: 1, fwdArgRegs: [], typeId:
123456789 }
body: |
- bb.0.entry:
- MOV32mi %stack.0.retval, 1, $noreg, 0, $noreg, 0 :: (store (s32) into
%ir.retval)
- MOV64mi32 %stack.1.fp, 1, $noreg, 0, $noreg, @foo :: (store (s64) into
%ir.fp)
- %0:gr64 = MOV32ri64 @foo
- ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead
$eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- %1:gr32 = MOV32ri 97
- $edi = COPY %1
+ bb.0.entry:
+ %0:gr64 = MOV32ri64 @foo
CALL64r killed %0, csr_64, implicit $rsp, implicit $ssp, implicit $edi,
implicit-def $rsp, implicit-def $ssp
- ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags,
implicit-def dead $ssp, implicit $rsp, implicit $ssp
- %2:gr32 = MOV32r0 implicit-def dead $eflags
- $eax = COPY %2
- RET 0, $eax
...
>From d4b6ae070c95cc4a2dce122c82af18f8d3174bb2 Mon Sep 17 00:00:00 2001
From: prabhukr <prabh...@google.com>
Date: Thu, 24 Apr 2025 02:24:46 +0000
Subject: [PATCH 5/6] Address review comments.
Created using spr 1.3.6-beta.1
---
llvm/lib/CodeGen/MIRPrinter.cpp | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index ef0a4ccccd4cd..e9fe4ab09c9bd 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -558,26 +558,29 @@ void
MIRPrinter::convertCallSiteObjects(yaml::MachineFunction &YMF,
const MachineFunction &MF,
ModuleSlotTracker &MST) {
const auto *TRI = MF.getSubtarget().getRegisterInfo();
- for (auto CSInfo : MF.getCallSitesInfo()) {
+ for (auto CSInfoMap : MF.getCallSitesInfo()) {
yaml::CallSiteInfo YmlCS;
yaml::MachineInstrLoc CallLocation;
// Prepare instruction position.
- MachineBasicBlock::const_instr_iterator CallI =
CSInfo.first->getIterator();
+ MachineBasicBlock::const_instr_iterator CallI =
+ CSInfoMap.first->getIterator();
CallLocation.BlockNum = CallI->getParent()->getNumber();
// Get call instruction offset from the beginning of block.
CallLocation.Offset =
std::distance(CallI->getParent()->instr_begin(), CallI);
YmlCS.CallLocation = CallLocation;
+
+ auto [ArgRegPairs, CalleeTypeIds] = CSInfoMap.second;
// Construct call arguments and theirs forwarding register info.
- for (auto ArgReg : CSInfo.second.ArgRegPairs) {
+ for (auto ArgReg : ArgRegPairs) {
yaml::CallSiteInfo::ArgRegPair YmlArgReg;
YmlArgReg.ArgNo = ArgReg.ArgNo;
printRegMIR(ArgReg.Reg, YmlArgReg.Reg, TRI);
YmlCS.ArgForwardingRegs.emplace_back(YmlArgReg);
}
// Get type ids.
- for (auto *CalleeTypeId : CSInfo.second.CalleeTypeIds) {
+ for (auto *CalleeTypeId : CalleeTypeIds) {
YmlCS.CalleeTypeIds.push_back(CalleeTypeId->getZExtValue());
}
YMF.CallSitesInfo.push_back(std::move(YmlCS));
>From 9f94841f38015166161444327ddbaeb810366f48 Mon Sep 17 00:00:00 2001
From: prabhukr <prabh...@google.com>
Date: Thu, 24 Apr 2025 20:39:29 +0000
Subject: [PATCH 6/6] Fix the test file formatting for calleeTypeIds.
Created using spr 1.3.6-beta.1
---
.../MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir | 3 +--
llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir | 3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git
a/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
b/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
index a7073cb1ca5f0..1a9477640f8f3 100644
---
a/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
+++
b/llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
@@ -49,8 +49,7 @@
name: main
callSites:
- { bb: 0, offset: 0, fwdArgRegs: [] }
- - { bb: 0, offset: 2, fwdArgRegs: [], calleeTypeIds:
- [ 1234567890 ] }
+ - { bb: 0, offset: 2, fwdArgRegs: [], calleeTypeIds: [ 1234567890 ] }
body: |
bb.0.entry:
CALL64pcrel32 @_Z13get_operationb, csr_64, implicit $rsp, implicit $ssp,
implicit $edi, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
diff --git a/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
b/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
index e2f212e52d176..c44a4df439609 100644
--- a/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
+++ b/llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
@@ -25,8 +25,7 @@
---
name: main
callSites:
- - { bb: 0, offset: 1, fwdArgRegs: [], calleeTypeIds:
- [ 123456789 ] }
+ - { bb: 0, offset: 1, fwdArgRegs: [], calleeTypeIds: [ 123456789 ] }
body: |
bb.0.entry:
%0:gr64 = MOV32ri64 @foo
_______________________________________________
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
