[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for select (PR #132384)

[Pierre van Houtryve via llvm-branch-commits]

================
@@ -286,6 +287,22 @@ void RegBankLegalizeHelper::lowerSplitTo32(MachineInstr 
&MI) {
   MI.eraseFromParent();
 }
 
+void RegBankLegalizeHelper::lowerSplitTo32Sel(MachineInstr &MI) {
+  Register Dst = MI.getOperand(0).getReg();
+  LLT Ty = MRI.getType(Dst) == V4S16 ? V2S16 : S32;
----------------
Pierre-vh wrote:

```suggestion
  LLT Ty = (MRI.getType(Dst) == V4S16 ? V2S16 : S32);
```
nit for clarity

+ if you expect the type to be something else when it isn't `V4S16`, add an 
assert?

https://github.com/llvm/llvm-project/pull/132384
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