Author: Daniel Kiss Date: 2025-05-23T18:16:24-07:00 New Revision: a169f5ca4e4fdd3e55baef9e69a3fa92e79d7b4a
URL: https://github.com/llvm/llvm-project/commit/a169f5ca4e4fdd3e55baef9e69a3fa92e79d7b4a DIFF: https://github.com/llvm/llvm-project/commit/a169f5ca4e4fdd3e55baef9e69a3fa92e79d7b4a.diff LOG: Correct position of CFI Instruction for Pointer Authentication" This a partial of reverts commit 0b73b5af60f2c544892b9dd68b4fa43eeff52fc1. Fixes #137802 Added: Modified: llvm/lib/Target/AArch64/AArch64PointerAuth.cpp llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll llvm/test/CodeGen/AArch64/sign-return-address.ll llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir Removed: ################################################################################ diff --git a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp index c3bc70ad6f427..aba84574c7526 100644 --- a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp +++ b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp @@ -152,12 +152,15 @@ void AArch64PointerAuth::signLR(MachineFunction &MF, ->setPreInstrSymbol(MF, MFnI.getSigningInstrLabel()); } else { BuildPACM(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameSetup); - emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameSetup, EmitCFI); + if (MFnI.branchProtectionPAuthLR()) + emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameSetup, EmitCFI); BuildMI(MBB, MBBI, DL, TII->get(MFnI.shouldSignWithBKey() ? AArch64::PACIBSP : AArch64::PACIASP)) .setMIFlag(MachineInstr::FrameSetup) ->setPreInstrSymbol(MF, MFnI.getSigningInstrLabel()); + if (!MFnI.branchProtectionPAuthLR()) + emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameSetup, EmitCFI); } if (!EmitCFI && NeedsWinCFI) { @@ -220,11 +223,15 @@ void AArch64PointerAuth::authenticateLR( .setMIFlag(MachineInstr::FrameDestroy); } else { BuildPACM(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameDestroy, PACSym); - emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameDestroy, - EmitAsyncCFI); + if (MFnI->branchProtectionPAuthLR()) + emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameDestroy, + EmitAsyncCFI); BuildMI(MBB, MBBI, DL, TII->get(UseBKey ? AArch64::AUTIBSP : AArch64::AUTIASP)) .setMIFlag(MachineInstr::FrameDestroy); + if (!MFnI->branchProtectionPAuthLR()) + emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameDestroy, + EmitAsyncCFI); } if (NeedsWinCFI) { diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll index e7de54036245a..4bbbe40176313 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll @@ -9,9 +9,9 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" { ; CHECK-LABEL: a: // @a ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: .cfi_negate_ra_state ; V8A-NEXT: hint #27 ; V83A-NEXT: pacibsp +; CHECK-NEXT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign- diff -scope-same-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign- diff -scope-same-key.ll index a26dda1d5c1f1..6a11bef08c740 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign- diff -scope-same-key.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign- diff -scope-same-key.ll @@ -5,9 +5,9 @@ define void @a() "sign-return-address"="all" { ; CHECK-LABEL: a: // @a -; CHECK: .cfi_negate_ra_state -; V8A-NEXT: hint #25 -; V83A-NEXT: paciasp +; V8A: hint #25 +; V83A: paciasp +; CHECK-NEXT: .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -52,9 +52,9 @@ define void @b() "sign-return-address"="non-leaf" { define void @c() "sign-return-address"="all" { ; CHECK-LABEL: c: // @c -; CHECK: .cfi_negate_ra_state -; V8A-NEXT: hint #25 -; V83A-NEXT: paciasp +; V8A: hint #25 +; V83A: paciasp +; CHECK-NEXT .cfi_negate_ra_state %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll index 064b2b78c7bc7..1e7224683c6c8 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll @@ -8,8 +8,8 @@ define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" ; V8A-LABEL: a: ; V8A: // %bb.0: ; V8A-NEXT: .cfi_b_key_frame -; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: hint #27 +; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: sub sp, sp, #32 ; V8A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill ; V8A-NEXT: .cfi_def_cfa_offset 32 @@ -26,8 +26,8 @@ define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" ; V83A-LABEL: a: ; V83A: // %bb.0: ; V83A-NEXT: .cfi_b_key_frame -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: pacibsp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: sub sp, sp, #32 ; V83A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill ; V83A-NEXT: .cfi_def_cfa_offset 32 @@ -59,8 +59,8 @@ define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" ; V8A-LABEL: b: ; V8A: // %bb.0: ; V8A-NEXT: .cfi_b_key_frame -; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: hint #27 +; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: sub sp, sp, #32 ; V8A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill ; V8A-NEXT: .cfi_def_cfa_offset 32 @@ -77,8 +77,8 @@ define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" ; V83A-LABEL: b: ; V83A: // %bb.0: ; V83A-NEXT: .cfi_b_key_frame -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: pacibsp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: sub sp, sp, #32 ; V83A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill ; V83A-NEXT: .cfi_def_cfa_offset 32 @@ -110,8 +110,8 @@ define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" ; V8A-LABEL: c: ; V8A: // %bb.0: ; V8A-NEXT: .cfi_b_key_frame -; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: hint #27 +; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: sub sp, sp, #32 ; V8A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill ; V8A-NEXT: .cfi_def_cfa_offset 32 @@ -128,8 +128,8 @@ define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" ; V83A-LABEL: c: ; V83A: // %bb.0: ; V83A-NEXT: .cfi_b_key_frame -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: pacibsp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: sub sp, sp, #32 ; V83A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill ; V83A-NEXT: .cfi_def_cfa_offset 32 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir index 218ee6609c803..9a983cbd6714e 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir @@ -81,8 +81,8 @@ body: | # CHECK: name: bar # CHECK: bb.0: # CHECK: frame-setup EMITBKEY -# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state # CHECK-NEXT: frame-setup PACIBSP implicit-def $lr, implicit $lr, implicit $sp +# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state # CHECK-NOT: OUTLINED_FUNCTION_ # CHECK: bb.1: # CHECK-NOT: OUTLINED_FUNCTION_ diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope- diff -key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope- diff -key.ll index 5c45373d8c1d6..87771f5de4f69 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope- diff -key.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope- diff -key.ll @@ -7,8 +7,8 @@ define void @a() "sign-return-address"="all" { ; V8A-LABEL: a: ; V8A: // %bb.0: -; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: hint #25 +; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: sub sp, sp, #32 ; V8A-NEXT: .cfi_def_cfa_offset 32 ; V8A-NEXT: mov w8, #1 // =0x1 @@ -26,8 +26,8 @@ define void @a() "sign-return-address"="all" { ; ; V83A-LABEL: a: ; V83A: // %bb.0: -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: sub sp, sp, #32 ; V83A-NEXT: .cfi_def_cfa_offset 32 ; V83A-NEXT: mov w8, #1 // =0x1 @@ -60,8 +60,8 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" { ; V8A-LABEL: b: ; V8A: // %bb.0: ; V8A-NEXT: .cfi_b_key_frame -; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: hint #27 +; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: sub sp, sp, #32 ; V8A-NEXT: .cfi_def_cfa_offset 32 ; V8A-NEXT: mov w8, #1 // =0x1 @@ -80,8 +80,8 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" { ; V83A-LABEL: b: ; V83A: // %bb.0: ; V83A-NEXT: .cfi_b_key_frame -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: pacibsp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: sub sp, sp, #32 ; V83A-NEXT: .cfi_def_cfa_offset 32 ; V83A-NEXT: mov w8, #1 // =0x1 @@ -113,8 +113,8 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" { define void @c() "sign-return-address"="all" { ; V8A-LABEL: c: ; V8A: // %bb.0: -; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: hint #25 +; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: sub sp, sp, #32 ; V8A-NEXT: .cfi_def_cfa_offset 32 ; V8A-NEXT: mov w8, #1 // =0x1 @@ -132,8 +132,8 @@ define void @c() "sign-return-address"="all" { ; ; V83A-LABEL: c: ; V83A: // %bb.0: -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: sub sp, sp, #32 ; V83A-NEXT: .cfi_def_cfa_offset 32 ; V83A-NEXT: mov w8, #1 // =0x1 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir index d4a4b886ec0e3..22e5edef2a939 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir @@ -86,11 +86,11 @@ body: | # CHECK: body: | # CHECK-NEXT: bb.0 (%ir-block.0): # CHECK-NEXT: liveins: $lr -# CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state -# CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state # CHECK: BL @[[OUTLINED_FUNC:OUTLINED_FUNCTION_[0-9]+]] -# CHECK: frame-destroy CFI_INSTRUCTION negate_ra_sign_state -# CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state # CHECK-NEXT: RET undef $lr ... @@ -119,11 +119,11 @@ body: | # CHECK: body: | # CHECK-NEXT: bb.0 (%ir-block.0): # CHECK-NEXT: liveins: $lr -# CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state -# CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state # CHECK: BL @[[OUTLINED_FUNC]] -# CHECK: frame-destroy CFI_INSTRUCTION negate_ra_sign_state -# CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state # CHECK-NEXT: RET undef $lr ... @@ -174,22 +174,22 @@ body: | # CHECK: body: | # CHECK-NEXT: bb.0 (%ir-block.0): # CHECK-NEXT: liveins: $lr -# CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state -# CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state # CHECK-NOT: BL @OUTLINED_FUNCTION_{{.*}} -# CHECK: frame-destroy CFI_INSTRUCTION negate_ra_sign_state -# CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state # CHECK-NEXT: RET undef $lr # CHECK-LABEL: name: illegal1 # CHECK: body: | # CHECK-NEXT: bb.0 (%ir-block.0): # CHECK-NEXT: liveins: $lr -# CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state -# CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state # CHECK-NOT: BL @OUTLINED_FUNCTION_{{.*}} -# CHECK: frame-destroy CFI_INSTRUCTION negate_ra_sign_state -# CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state # CHECK-NEXT: RET undef $lr # Outlined function that contains only legal sp modifications @@ -198,8 +198,8 @@ body: | # CHECK-NEXT: bb.0: # CHECK-NEXT: liveins: $lr # CHECK-NEXT: {{^ $}} -# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state # CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp +# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state # CHECK-NEXT: $sp = frame-setup SUBXri $sp, 16, 0 # CHECK: $sp = frame-destroy ADDXri $sp, 16, 0 # CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll index cb43b3ba3e47e..a7ea32952f3b7 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll @@ -9,8 +9,8 @@ define void @a() #0 { ; CHECK-LABEL: a: // @a ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: pacibsp +; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NOT: OUTLINED_FUNCTION_ %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -33,8 +33,8 @@ define void @b() #0 { ; CHECK-LABEL: b: // @b ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: pacibsp +; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NOT: OUTLINED_FUNCTION_ %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -57,8 +57,8 @@ define void @c() #1 { ; CHECK-LABEL: c: // @c ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: hint #27 +; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NOT: OUTLINED_FUNCTION_ %1 = alloca i32, align 4 %2 = alloca i32, align 4 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll index 0ba4455532925..da68ea5bf0dbc 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll @@ -10,8 +10,8 @@ declare i32 @thunk_called_fn(i32, i32, i32, i32) define i32 @a() #0 { ; V8A-LABEL: a: ; V8A: // %bb.0: // %entry -; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: hint #25 +; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V8A-NEXT: .cfi_def_cfa_offset 16 ; V8A-NEXT: .cfi_offset w30, -16 @@ -27,8 +27,8 @@ define i32 @a() #0 { ; ; V83A-LABEL: a: ; V83A: // %bb.0: // %entry -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V83A-NEXT: .cfi_def_cfa_offset 16 ; V83A-NEXT: .cfi_offset w30, -16 @@ -49,8 +49,8 @@ entry: define i32 @b() #0 { ; V8A-LABEL: b: ; V8A: // %bb.0: // %entry -; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: hint #25 +; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V8A-NEXT: .cfi_def_cfa_offset 16 ; V8A-NEXT: .cfi_offset w30, -16 @@ -66,8 +66,8 @@ define i32 @b() #0 { ; ; V83A-LABEL: b: ; V83A: // %bb.0: // %entry -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V83A-NEXT: .cfi_def_cfa_offset 16 ; V83A-NEXT: .cfi_offset w30, -16 @@ -88,8 +88,8 @@ entry: define hidden i32 @c(ptr %fptr) #0 { ; V8A-LABEL: c: ; V8A: // %bb.0: // %entry -; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: hint #25 +; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V8A-NEXT: .cfi_def_cfa_offset 16 ; V8A-NEXT: .cfi_offset w30, -16 @@ -106,8 +106,8 @@ define hidden i32 @c(ptr %fptr) #0 { ; ; V83A-LABEL: c: ; V83A: // %bb.0: // %entry -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V83A-NEXT: .cfi_def_cfa_offset 16 ; V83A-NEXT: .cfi_offset w30, -16 @@ -129,8 +129,8 @@ entry: define hidden i32 @d(ptr %fptr) #0 { ; V8A-LABEL: d: ; V8A: // %bb.0: // %entry -; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: hint #25 +; V8A-NEXT: .cfi_negate_ra_state ; V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V8A-NEXT: .cfi_def_cfa_offset 16 ; V8A-NEXT: .cfi_offset w30, -16 @@ -147,8 +147,8 @@ define hidden i32 @d(ptr %fptr) #0 { ; ; V83A-LABEL: d: ; V83A: // %bb.0: // %entry -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V83A-NEXT: .cfi_def_cfa_offset 16 ; V83A-NEXT: .cfi_offset w30, -16 @@ -176,5 +176,3 @@ attributes #0 = { "sign-return-address"="non-leaf" minsize } ; CHECK-NOT: .cfi_negate_ra_state ; CHECK-NOT: auti{{[a,b]}}sp ; CHECK-NOT: hint #{{[29,31]}} -;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: -; CHECK: {{.*}} diff --git a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll index f823d2aa82ac0..373c4969a9405 100644 --- a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll +++ b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll @@ -34,8 +34,8 @@ entry: } ;; CHECK-LABEL: __llvm_gcov_writeout: ;; CHECK: .cfi_b_key_frame -;; CHECK-NEXT: .cfi_negate_ra_state ;; CHECK-NEXT: pacibsp +;; CHECK-NEXT: .cfi_negate_ra_state define internal void @__llvm_gcov_reset() unnamed_addr #2 { entry: @@ -54,9 +54,9 @@ entry: } ;; CHECK-LABEL: __llvm_gcov_init: ;; CHECK: .cfi_b_key_frame +;; CHECK-NEXT: pacibsp ;; CHECK-NEXT: .cfi_negate_ra_state ;; CHECK-NOT: .cfi_ -;; CHECK-NEXT: pacibsp ;; CHECK: .cfi_endproc attributes #0 = { norecurse nounwind readnone "sign-return-address"="all" "sign-return-address-key"="b_key" } diff --git a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll index 6ea072846d47c..4d4b7c215b978 100644 --- a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll +++ b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll @@ -9,8 +9,8 @@ define dso_local i32 @_Z3fooi(i32 %x) #0 { ; CHECK-V8A-LABEL: _Z3fooi: ; CHECK-V8A: // %bb.0: // %entry -; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: hint #25 +; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; CHECK-V8A-NEXT: .cfi_def_cfa_offset 16 ; CHECK-V8A-NEXT: .cfi_offset w30, -16 @@ -27,8 +27,8 @@ define dso_local i32 @_Z3fooi(i32 %x) #0 { ; ; CHECK-V83A-LABEL: _Z3fooi: ; CHECK-V83A: // %bb.0: // %entry -; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: paciasp +; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; CHECK-V83A-NEXT: .cfi_def_cfa_offset 16 ; CHECK-V83A-NEXT: .cfi_offset w30, -16 @@ -62,8 +62,8 @@ return: ; No predecessors! define hidden noundef i32 @baz_async(i32 noundef %a) #0 uwtable(async) { ; CHECK-V8A-LABEL: baz_async: ; CHECK-V8A: // %bb.0: // %entry -; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: hint #25 +; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; CHECK-V8A-NEXT: .cfi_def_cfa_offset 16 ; CHECK-V8A-NEXT: .cfi_offset w30, -16 @@ -74,8 +74,8 @@ define hidden noundef i32 @baz_async(i32 noundef %a) #0 uwtable(async) { ; CHECK-V8A-NEXT: bl _Z3bari ; CHECK-V8A-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-V8A-NEXT: .cfi_def_cfa_offset 0 -; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: hint #29 +; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: .cfi_restore w30 ; CHECK-V8A-NEXT: b _Z3bari ; CHECK-V8A-NEXT: .LBB1_2: // %if.else @@ -84,15 +84,15 @@ define hidden noundef i32 @baz_async(i32 noundef %a) #0 uwtable(async) { ; CHECK-V8A-NEXT: add w0, w0, #1 ; CHECK-V8A-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-V8A-NEXT: .cfi_def_cfa_offset 0 -; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: hint #29 +; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: .cfi_restore w30 ; CHECK-V8A-NEXT: ret ; ; CHECK-V83A-LABEL: baz_async: ; CHECK-V83A: // %bb.0: // %entry -; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: paciasp +; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; CHECK-V83A-NEXT: .cfi_def_cfa_offset 16 ; CHECK-V83A-NEXT: .cfi_offset w30, -16 @@ -103,8 +103,8 @@ define hidden noundef i32 @baz_async(i32 noundef %a) #0 uwtable(async) { ; CHECK-V83A-NEXT: bl _Z3bari ; CHECK-V83A-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-V83A-NEXT: .cfi_def_cfa_offset 0 -; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: autiasp +; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: .cfi_restore w30 ; CHECK-V83A-NEXT: b _Z3bari ; CHECK-V83A-NEXT: .LBB1_2: // %if.else @@ -143,8 +143,8 @@ return: ; preds = %if.else, %if.then define hidden noundef i32 @baz_sync(i32 noundef %a) #0 uwtable(sync) { ; CHECK-V8A-LABEL: baz_sync: ; CHECK-V8A: // %bb.0: // %entry -; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: hint #25 +; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; CHECK-V8A-NEXT: .cfi_def_cfa_offset 16 ; CHECK-V8A-NEXT: .cfi_offset w30, -16 @@ -164,8 +164,8 @@ define hidden noundef i32 @baz_sync(i32 noundef %a) #0 uwtable(sync) { ; ; CHECK-V83A-LABEL: baz_sync: ; CHECK-V83A: // %bb.0: // %entry -; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: paciasp +; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; CHECK-V83A-NEXT: .cfi_def_cfa_offset 16 ; CHECK-V83A-NEXT: .cfi_offset w30, -16 @@ -216,7 +216,7 @@ attributes #0 = { "sign-return-address"="all" } ; CHECK-DUMP-NOT: DW_CFA_remember_state ; CHECK-DUMP-NOT: DW_CFA_restore_state -; CHECK-DUMP: CFA=WSP +; CHECK-DUMP: CFA=WSP{{$}} ; CHECK-DUMP: reg34=1 ; CHECK-DUMP-NOT: reg34=0 @@ -229,7 +229,6 @@ attributes #0 = { "sign-return-address"="all" } ; CHECK-DUMP: DW_CFA_restore_state: ; CHECK-DUMP: DW_CFA_AARCH64_negate_ra_state: -; CHECK-DUMP: CFA=WSP ;; First DW_CFA_AARCH64_negate_ra_state: ; CHECK-DUMP: reg34=1 ;; Second DW_CFA_AARCH64_negate_ra_state: @@ -238,6 +237,7 @@ attributes #0 = { "sign-return-address"="all" } ; CHECK-DUMP: reg34=1 ;; Third DW_CFA_AARCH64_negate_ra_state: ; CHECK-DUMP: reg34=0 +; CHECK-DUMP-NOT: reg34=1 ; baz_sync ; CHECK-DUMP-LABEL: FDE @@ -246,6 +246,6 @@ attributes #0 = { "sign-return-address"="all" } ; CHECK-DUMP-NOT: DW_CFA_remember_state ; CHECK-DUMP-NOT: DW_CFA_restore_state -; CHECK-DUMP: CFA=WSP +; CHECK-DUMP: CFA=WSP{{$}} ; CHECK-DUMP: reg34=1 ; CHECK-DUMP-NOT: reg34=0 diff --git a/llvm/test/CodeGen/AArch64/sign-return-address.ll b/llvm/test/CodeGen/AArch64/sign-return-address.ll index e0ee0d84ab4f1..dafe0d71ceb5f 100644 --- a/llvm/test/CodeGen/AArch64/sign-return-address.ll +++ b/llvm/test/CodeGen/AArch64/sign-return-address.ll @@ -29,15 +29,15 @@ define i32 @leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" { ; COMPAT-LABEL: leaf_sign_all: ; COMPAT: // %bb.0: -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #25 +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #29 ; COMPAT-NEXT: ret ; ; V83A-LABEL: leaf_sign_all: ; V83A: // %bb.0: -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: retaa ret i32 %x } @@ -45,8 +45,8 @@ define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" { define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" { ; COMPAT-LABEL: leaf_clobbers_lr: ; COMPAT: // %bb.0: -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #25 +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; COMPAT-NEXT: .cfi_def_cfa_offset 16 ; COMPAT-NEXT: .cfi_offset w30, -16 @@ -59,8 +59,8 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" { ; ; V83A-LABEL: leaf_clobbers_lr: ; V83A: // %bb.0: -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V83A-NEXT: .cfi_def_cfa_offset 16 ; V83A-NEXT: .cfi_offset w30, -16 @@ -78,8 +78,8 @@ declare i32 @foo(i32) define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" { ; COMPAT-LABEL: non_leaf_sign_all: ; COMPAT: // %bb.0: -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #25 +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; COMPAT-NEXT: .cfi_def_cfa_offset 16 ; COMPAT-NEXT: .cfi_offset w30, -16 @@ -90,8 +90,8 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" { ; ; V83A-LABEL: non_leaf_sign_all: ; V83A: // %bb.0: -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V83A-NEXT: .cfi_def_cfa_offset 16 ; V83A-NEXT: .cfi_offset w30, -16 @@ -105,8 +105,8 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" { define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { ; COMPAT-LABEL: non_leaf_sign_non_leaf: ; COMPAT: // %bb.0: -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #25 +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; COMPAT-NEXT: .cfi_def_cfa_offset 16 ; COMPAT-NEXT: .cfi_offset w30, -16 @@ -117,8 +117,8 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { ; ; V83A-LABEL: non_leaf_sign_non_leaf: ; V83A: // %bb.0: -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V83A-NEXT: .cfi_def_cfa_offset 16 ; V83A-NEXT: .cfi_offset w30, -16 @@ -135,8 +135,8 @@ define i32 @non_leaf_scs(i32 %x) "sign-return-address"="non-leaf" shadowcallstac ; CHECK: // %bb.0: ; CHECK-NEXT: str x30, [x18], #8 ; CHECK-NEXT: .cfi_escape 0x16, 0x12, 0x02, 0x82, 0x78 // -; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: paciasp +; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_offset w30, -16 @@ -152,8 +152,8 @@ define i32 @non_leaf_scs(i32 %x) "sign-return-address"="non-leaf" shadowcallstac define i32 @leaf_sign_all_v83(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" { ; CHECK-LABEL: leaf_sign_all_v83: ; CHECK: // %bb.0: -; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: paciasp +; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: retaa ret i32 %x } @@ -163,8 +163,8 @@ declare fastcc i64 @bar(i64) define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" { ; COMPAT-LABEL: spill_lr_and_tail_call: ; COMPAT: // %bb.0: -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #25 +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; COMPAT-NEXT: .cfi_def_cfa_offset 16 ; COMPAT-NEXT: .cfi_offset w30, -16 @@ -177,8 +177,8 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" { ; ; V83A-LABEL: spill_lr_and_tail_call: ; V83A: // %bb.0: -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill ; V83A-NEXT: .cfi_def_cfa_offset 16 ; V83A-NEXT: .cfi_offset w30, -16 @@ -196,15 +196,15 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" { define i32 @leaf_sign_all_a_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" { ; COMPAT-LABEL: leaf_sign_all_a_key: ; COMPAT: // %bb.0: -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #25 +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #29 ; COMPAT-NEXT: ret ; ; V83A-LABEL: leaf_sign_all_a_key: ; V83A: // %bb.0: -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: retaa ret i32 %x } @@ -213,16 +213,16 @@ define i32 @leaf_sign_all_b_key(i32 %x) "sign-return-address"="all" "sign-return ; COMPAT-LABEL: leaf_sign_all_b_key: ; COMPAT: // %bb.0: ; COMPAT-NEXT: .cfi_b_key_frame -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #27 +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #31 ; COMPAT-NEXT: ret ; ; V83A-LABEL: leaf_sign_all_b_key: ; V83A: // %bb.0: ; V83A-NEXT: .cfi_b_key_frame -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: pacibsp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: retab ret i32 %x } @@ -231,8 +231,8 @@ define i32 @leaf_sign_all_v83_b_key(i32 %x) "sign-return-address"="all" "target- ; CHECK-LABEL: leaf_sign_all_v83_b_key: ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: pacibsp +; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: retab ret i32 %x } @@ -241,15 +241,15 @@ define i32 @leaf_sign_all_v83_b_key(i32 %x) "sign-return-address"="all" "target- define i32 @leaf_sign_all_a_key_bti(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" "branch-target-enforcement"{ ; COMPAT-LABEL: leaf_sign_all_a_key_bti: ; COMPAT: // %bb.0: -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #25 +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #29 ; COMPAT-NEXT: ret ; ; V83A-LABEL: leaf_sign_all_a_key_bti: ; V83A: // %bb.0: -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: paciasp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: retaa ret i32 %x } @@ -259,16 +259,16 @@ define i32 @leaf_sign_all_b_key_bti(i32 %x) "sign-return-address"="all" "sign-re ; COMPAT-LABEL: leaf_sign_all_b_key_bti: ; COMPAT: // %bb.0: ; COMPAT-NEXT: .cfi_b_key_frame -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #27 +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: hint #31 ; COMPAT-NEXT: ret ; ; V83A-LABEL: leaf_sign_all_b_key_bti: ; V83A: // %bb.0: ; V83A-NEXT: .cfi_b_key_frame -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: pacibsp +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: retab ret i32 %x } @@ -278,8 +278,8 @@ define i32 @leaf_sign_all_v83_b_key_bti(i32 %x) "sign-return-address"="all" "tar ; CHECK-LABEL: leaf_sign_all_v83_b_key_bti: ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame -; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: pacibsp +; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: retab ret i32 %x } diff --git a/llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir b/llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir index b2abff75880c9..1030917c87419 100644 --- a/llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir +++ b/llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir @@ -25,8 +25,8 @@ alignment: 4 tracksRegLiveness: true frameInfo: maxCallFrameSize: 0 -#CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state #CHECK: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp +#CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state #CHECK: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp body: | bb.0.entry: @@ -42,8 +42,8 @@ tracksRegLiveness: true frameInfo: maxCallFrameSize: 0 #CHECK: frame-setup EMITBKEY -#CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state #CHECK: frame-setup PACIBSP implicit-def $lr, implicit $lr, implicit $sp +#CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state #CHECK: frame-destroy AUTIBSP implicit-def $lr, implicit $lr, implicit $sp body: | bb.0.entry: _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
