https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/142604
>From f9141055a09fc376354f901932b0a39e28d58c35 Mon Sep 17 00:00:00 2001
From: pvanhout <pierre.vanhoutr...@amd.com>
Date: Tue, 3 Jun 2025 15:08:06 +0200
Subject: [PATCH 1/2] [AMDGPU] New RegBankSelect: Add rules for `G_PTRTOINT`
and `G_INTTOPTR`
---
.../AMDGPU/AMDGPURegBankLegalizeRules.cpp | 16 ++-
.../GlobalISel/regbankselect-inttoptr.mir | 98 +++++++++++++++++++
.../GlobalISel/regbankselect-ptrtoint.mir | 98 +++++++++++++++++++
3 files changed, 211 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
index b6260076731ba..cbba5764045fd 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
@@ -736,7 +736,21 @@ RegBankLegalizeRules::RegBankLegalizeRules(const
GCNSubtarget &_ST,
.Any({{DivP1}, {{VgprP1}, {VgprP1, Vgpr64}}})
.Any({{DivP0}, {{VgprP0}, {VgprP0, Vgpr64}}});
- addRulesForGOpcs({G_INTTOPTR}).Any({{UniP4}, {{SgprP4}, {Sgpr64}}});
+ addRulesForGOpcs({G_INTTOPTR})
+ .Any({{UniPtr32}, {{SgprPtr32}, {Sgpr32}}})
+ .Any({{DivPtr32}, {{VgprPtr32}, {Vgpr32}}})
+ .Any({{UniPtr64}, {{SgprPtr64}, {Sgpr64}}})
+ .Any({{DivPtr64}, {{VgprPtr64}, {Vgpr64}}})
+ .Any({{UniPtr128}, {{SgprPtr128}, {Sgpr128}}})
+ .Any({{DivPtr128}, {{VgprPtr128}, {Vgpr128}}});
+
+ addRulesForGOpcs({G_PTRTOINT})
+ .Any({{UniS32}, {{Sgpr32}, {SgprPtr32}}})
+ .Any({{DivS32}, {{Vgpr32}, {VgprPtr32}}})
+ .Any({{UniS64}, {{Sgpr64}, {SgprPtr64}}})
+ .Any({{DivS64}, {{Vgpr64}, {VgprPtr64}}})
+ .Any({{UniS128}, {{Sgpr128}, {SgprPtr128}}})
+ .Any({{DivS128}, {{Vgpr128}, {VgprPtr128}}});
addRulesForGOpcs({G_ABS}, Standard).Uni(S16, {{Sgpr32Trunc}, {Sgpr32SExt}});
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir
b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir
index 42600d7d0dd7a..d9b1b6e20089b 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir
@@ -2,6 +2,8 @@
# RUN: llc -mtriple=amdgcn -run-pass=regbankselect %s -verify-machineinstrs -o
- -regbankselect-fast | FileCheck %s
# RUN: llc -mtriple=amdgcn -run-pass=regbankselect %s -verify-machineinstrs -o
- -regbankselect-greedy | FileCheck %s
+# RUN: llc -mtriple=amdgcn -mcpu=fiji
-run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" %s
-verify-machineinstrs -o - | FileCheck %s --check-prefix=NEW_RBS
+
---
name: inttoptr_s_p0
legalized: true
@@ -14,6 +16,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p0) = G_INTTOPTR [[COPY]](s64)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_s_p0
+ ; NEW_RBS: liveins: $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p0) = G_INTTOPTR [[COPY]](s64)
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(p0) = G_INTTOPTR %0
...
@@ -30,6 +38,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p0) = G_INTTOPTR [[COPY]](s64)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_v_p0
+ ; NEW_RBS: liveins: $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p0) = G_INTTOPTR [[COPY]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(p0) = G_INTTOPTR %0
...
@@ -46,6 +60,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p1) = G_INTTOPTR [[COPY]](s64)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_s_p1
+ ; NEW_RBS: liveins: $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p1) = G_INTTOPTR [[COPY]](s64)
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(p1) = G_INTTOPTR %0
...
@@ -62,6 +82,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p1) = G_INTTOPTR [[COPY]](s64)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_v_p1
+ ; NEW_RBS: liveins: $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p1) = G_INTTOPTR [[COPY]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(p1) = G_INTTOPTR %0
...
@@ -78,6 +104,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p2) = G_INTTOPTR [[COPY]](s32)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_s_p2
+ ; NEW_RBS: liveins: $sgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p2) = G_INTTOPTR [[COPY]](s32)
%0:_(s32) = COPY $sgpr0
%1:_(p2) = G_INTTOPTR %0
...
@@ -94,6 +126,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p2) = G_INTTOPTR [[COPY]](s32)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_v_p2
+ ; NEW_RBS: liveins: $vgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p2) = G_INTTOPTR [[COPY]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(p2) = G_INTTOPTR %0
...
@@ -110,6 +148,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p3) = G_INTTOPTR [[COPY]](s32)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_s_p3
+ ; NEW_RBS: liveins: $sgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p3) = G_INTTOPTR [[COPY]](s32)
%0:_(s32) = COPY $sgpr0
%1:_(p3) = G_INTTOPTR %0
...
@@ -126,6 +170,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p3) = G_INTTOPTR [[COPY]](s32)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_v_p3
+ ; NEW_RBS: liveins: $vgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p3) = G_INTTOPTR [[COPY]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(p3) = G_INTTOPTR %0
...
@@ -142,6 +192,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p4) = G_INTTOPTR [[COPY]](s64)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_s_p4
+ ; NEW_RBS: liveins: $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p4) = G_INTTOPTR [[COPY]](s64)
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(p4) = G_INTTOPTR %0
...
@@ -158,6 +214,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p4) = G_INTTOPTR [[COPY]](s64)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_v_p4
+ ; NEW_RBS: liveins: $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p4) = G_INTTOPTR [[COPY]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(p4) = G_INTTOPTR %0
...
@@ -174,6 +236,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p5) = G_INTTOPTR [[COPY]](s32)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_s_p5
+ ; NEW_RBS: liveins: $sgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p5) = G_INTTOPTR [[COPY]](s32)
%0:_(s32) = COPY $sgpr0
%1:_(p5) = G_INTTOPTR %0
...
@@ -190,6 +258,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p5) = G_INTTOPTR [[COPY]](s32)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_v_p5
+ ; NEW_RBS: liveins: $vgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p5) = G_INTTOPTR [[COPY]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(p5) = G_INTTOPTR %0
...
@@ -206,6 +280,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p6) = G_INTTOPTR [[COPY]](s32)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_s_p6
+ ; NEW_RBS: liveins: $sgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p6) = G_INTTOPTR [[COPY]](s32)
%0:_(s32) = COPY $sgpr0
%1:_(p6) = G_INTTOPTR %0
...
@@ -222,6 +302,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p6) = G_INTTOPTR [[COPY]](s32)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_v_p6
+ ; NEW_RBS: liveins: $vgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p6) = G_INTTOPTR [[COPY]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(p6) = G_INTTOPTR %0
...
@@ -238,6 +324,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s128) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p8) = G_INTTOPTR [[COPY]](s128)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_s_p8
+ ; NEW_RBS: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(s128) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:sgpr(p8) = G_INTTOPTR [[COPY]](s128)
%0:_(s128) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
%1:_(p8) = G_INTTOPTR %0
...
@@ -254,6 +346,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p8) = G_INTTOPTR [[COPY]](s128)
+ ;
+ ; NEW_RBS-LABEL: name: inttoptr_v_p8
+ ; NEW_RBS: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+ ; NEW_RBS-NEXT: [[INTTOPTR:%[0-9]+]]:vgpr(p8) = G_INTTOPTR [[COPY]](s128)
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(p8) = G_INTTOPTR %0
...
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir
b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir
index 9240c9f6df404..d0cb24f5072c0 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir
@@ -2,6 +2,8 @@
# RUN: llc -mtriple=amdgcn -run-pass=regbankselect %s -verify-machineinstrs -o
- -regbankselect-fast | FileCheck %s
# RUN: llc -mtriple=amdgcn -run-pass=regbankselect %s -verify-machineinstrs -o
- -regbankselect-greedy | FileCheck %s
+# RUN: llc -mtriple=amdgcn -mcpu=fiji
-run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" %s
-verify-machineinstrs -o - | FileCheck %s --check-prefix=NEW_RBS
+
---
name: ptrtoint_s_p0
legalized: true
@@ -14,6 +16,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p0) = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s64) = G_PTRTOINT [[COPY]](p0)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_s_p0
+ ; NEW_RBS: liveins: $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(p0) = COPY $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s64) = G_PTRTOINT [[COPY]](p0)
%0:_(p0) = COPY $sgpr0_sgpr1
%1:_(s64) = G_PTRTOINT %0
...
@@ -30,6 +38,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s64) = G_PTRTOINT [[COPY]](p0)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_v_p0
+ ; NEW_RBS: liveins: $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(p0) = COPY $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s64) = G_PTRTOINT [[COPY]](p0)
%0:_(p0) = COPY $vgpr0_vgpr1
%1:_(s64) = G_PTRTOINT %0
...
@@ -46,6 +60,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s64) = G_PTRTOINT [[COPY]](p1)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_s_p1
+ ; NEW_RBS: liveins: $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s64) = G_PTRTOINT [[COPY]](p1)
%0:_(p1) = COPY $sgpr0_sgpr1
%1:_(s64) = G_PTRTOINT %0
...
@@ -62,6 +82,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s64) = G_PTRTOINT [[COPY]](p1)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_v_p1
+ ; NEW_RBS: liveins: $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s64) = G_PTRTOINT [[COPY]](p1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s64) = G_PTRTOINT %0
...
@@ -78,6 +104,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p2) = COPY $sgpr0
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s32) = G_PTRTOINT [[COPY]](p2)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_s_p2
+ ; NEW_RBS: liveins: $sgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(p2) = COPY $sgpr0
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s32) = G_PTRTOINT [[COPY]](p2)
%0:_(p2) = COPY $sgpr0
%1:_(s32) = G_PTRTOINT %0
...
@@ -94,6 +126,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p2) = COPY $vgpr0
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s32) = G_PTRTOINT [[COPY]](p2)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_v_p2
+ ; NEW_RBS: liveins: $vgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(p2) = COPY $vgpr0
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s32) = G_PTRTOINT [[COPY]](p2)
%0:_(p2) = COPY $vgpr0
%1:_(s32) = G_PTRTOINT %0
...
@@ -110,6 +148,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p3) = COPY $sgpr0
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s32) = G_PTRTOINT [[COPY]](p3)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_s_p3
+ ; NEW_RBS: liveins: $sgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(p3) = COPY $sgpr0
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s32) = G_PTRTOINT [[COPY]](p3)
%0:_(p3) = COPY $sgpr0
%1:_(s32) = G_PTRTOINT %0
...
@@ -126,6 +170,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s32) = G_PTRTOINT [[COPY]](p3)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_v_p3
+ ; NEW_RBS: liveins: $vgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s32) = G_PTRTOINT [[COPY]](p3)
%0:_(p3) = COPY $vgpr0
%1:_(s32) = G_PTRTOINT %0
...
@@ -142,6 +192,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s64) = G_PTRTOINT [[COPY]](p4)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_s_p4
+ ; NEW_RBS: liveins: $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s64) = G_PTRTOINT [[COPY]](p4)
%0:_(p4) = COPY $sgpr0_sgpr1
%1:_(s64) = G_PTRTOINT %0
...
@@ -158,6 +214,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p4) = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s64) = G_PTRTOINT [[COPY]](p4)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_v_p4
+ ; NEW_RBS: liveins: $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(p4) = COPY $vgpr0_vgpr1
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s64) = G_PTRTOINT [[COPY]](p4)
%0:_(p4) = COPY $vgpr0_vgpr1
%1:_(s64) = G_PTRTOINT %0
...
@@ -174,6 +236,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sgpr0
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s32) = G_PTRTOINT [[COPY]](p5)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_s_p5
+ ; NEW_RBS: liveins: $sgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(p5) = COPY $sgpr0
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s32) = G_PTRTOINT [[COPY]](p5)
%0:_(p5) = COPY $sgpr0
%1:_(s32) = G_PTRTOINT %0
...
@@ -190,6 +258,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p5) = COPY $vgpr0
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s32) = G_PTRTOINT [[COPY]](p5)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_v_p5
+ ; NEW_RBS: liveins: $vgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(p5) = COPY $vgpr0
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s32) = G_PTRTOINT [[COPY]](p5)
%0:_(p5) = COPY $vgpr0
%1:_(s32) = G_PTRTOINT %0
...
@@ -206,6 +280,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p6) = COPY $sgpr0
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s32) = G_PTRTOINT [[COPY]](p6)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_s_p6
+ ; NEW_RBS: liveins: $sgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(p6) = COPY $sgpr0
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s32) = G_PTRTOINT [[COPY]](p6)
%0:_(p6) = COPY $sgpr0
%1:_(s32) = G_PTRTOINT %0
...
@@ -222,6 +302,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p6) = COPY $vgpr0
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s32) = G_PTRTOINT [[COPY]](p6)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_v_p6
+ ; NEW_RBS: liveins: $vgpr0
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(p6) = COPY $vgpr0
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s32) = G_PTRTOINT [[COPY]](p6)
%0:_(p6) = COPY $vgpr0
%1:_(s32) = G_PTRTOINT %0
...
@@ -238,6 +324,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p8) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s128) = G_PTRTOINT [[COPY]](p8)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_s_p8
+ ; NEW_RBS: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:sgpr(p8) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:sgpr(s128) = G_PTRTOINT [[COPY]](p8)
%0:_(p8) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
%1:_(s128) = G_PTRTOINT %0
...
@@ -254,6 +346,12 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p8) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s128) = G_PTRTOINT [[COPY]](p8)
+ ;
+ ; NEW_RBS-LABEL: name: ptrtoint_v_p8
+ ; NEW_RBS: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
+ ; NEW_RBS-NEXT: {{ $}}
+ ; NEW_RBS-NEXT: [[COPY:%[0-9]+]]:vgpr(p8) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+ ; NEW_RBS-NEXT: [[PTRTOINT:%[0-9]+]]:vgpr(s128) = G_PTRTOINT [[COPY]](p8)
%0:_(p8) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(s128) = G_PTRTOINT %0
...
>From 0798b87391a5de6d28188c21becda9cfdcb57404 Mon Sep 17 00:00:00 2001
From: pvanhout <pierre.vanhoutr...@amd.com>
Date: Tue, 3 Jun 2025 15:17:31 +0200
Subject: [PATCH 2/2] clang-format
---
.../Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
index cbba5764045fd..abf9de902e478 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
@@ -737,18 +737,18 @@ RegBankLegalizeRules::RegBankLegalizeRules(const
GCNSubtarget &_ST,
.Any({{DivP0}, {{VgprP0}, {VgprP0, Vgpr64}}});
addRulesForGOpcs({G_INTTOPTR})
- .Any({{UniPtr32}, {{SgprPtr32}, {Sgpr32}}})
- .Any({{DivPtr32}, {{VgprPtr32}, {Vgpr32}}})
- .Any({{UniPtr64}, {{SgprPtr64}, {Sgpr64}}})
- .Any({{DivPtr64}, {{VgprPtr64}, {Vgpr64}}})
+ .Any({{UniPtr32}, {{SgprPtr32}, {Sgpr32}}})
+ .Any({{DivPtr32}, {{VgprPtr32}, {Vgpr32}}})
+ .Any({{UniPtr64}, {{SgprPtr64}, {Sgpr64}}})
+ .Any({{DivPtr64}, {{VgprPtr64}, {Vgpr64}}})
.Any({{UniPtr128}, {{SgprPtr128}, {Sgpr128}}})
.Any({{DivPtr128}, {{VgprPtr128}, {Vgpr128}}});
addRulesForGOpcs({G_PTRTOINT})
- .Any({{UniS32}, {{Sgpr32}, {SgprPtr32}}})
- .Any({{DivS32}, {{Vgpr32}, {VgprPtr32}}})
- .Any({{UniS64}, {{Sgpr64}, {SgprPtr64}}})
- .Any({{DivS64}, {{Vgpr64}, {VgprPtr64}}})
+ .Any({{UniS32}, {{Sgpr32}, {SgprPtr32}}})
+ .Any({{DivS32}, {{Vgpr32}, {VgprPtr32}}})
+ .Any({{UniS64}, {{Sgpr64}, {SgprPtr64}}})
+ .Any({{DivS64}, {{Vgpr64}, {VgprPtr64}}})
.Any({{UniS128}, {{Sgpr128}, {SgprPtr128}}})
.Any({{DivS128}, {{Vgpr128}, {VgprPtr128}}});
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