https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/142905
>From e245a542fc0b5210f84dcae77875d97024954464 Mon Sep 17 00:00:00 2001 From: Matt Arsenault <matthew.arsena...@amd.com> Date: Thu, 5 Jun 2025 14:22:55 +0900 Subject: [PATCH] DAG: Move soft float predicate management into RuntimeLibcalls Work towards making RuntimeLibcalls the centralized location for all libcall information. This requires changing the encoding from tracking the ISD::CondCode to using CmpInst::Predicate. --- llvm/include/llvm/CodeGen/TargetLowering.h | 14 +- llvm/include/llvm/IR/RuntimeLibcalls.h | 25 +++ .../CodeGen/SelectionDAG/TargetLowering.cpp | 5 +- llvm/lib/IR/RuntimeLibcalls.cpp | 36 ++++ llvm/lib/Target/ARM/ARMISelLowering.cpp | 178 +++++++++--------- llvm/lib/Target/MSP430/MSP430ISelLowering.cpp | 130 ++++++------- 6 files changed, 224 insertions(+), 164 deletions(-) diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h index 9c453f51e129d..0d157de479141 100644 --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -3572,20 +3572,18 @@ class LLVM_ABI TargetLoweringBase { /// Override the default CondCode to be used to test the result of the /// comparison libcall against zero. - /// FIXME: This can't be merged with 'RuntimeLibcallsInfo' because of the ISD. - void setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC) { - CmpLibcallCCs[Call] = CC; + /// FIXME: This should be removed + void setCmpLibcallCC(RTLIB::Libcall Call, CmpInst::Predicate Pred) { + Libcalls.setSoftFloatCmpLibcallPredicate(Call, Pred); } - /// Get the CondCode that's to be used to test the result of the comparison /// libcall against zero. - /// FIXME: This can't be merged with 'RuntimeLibcallsInfo' because of the ISD. - ISD::CondCode getCmpLibcallCC(RTLIB::Libcall Call) const { - return CmpLibcallCCs[Call]; + CmpInst::Predicate + getSoftFloatCmpLibcallPredicate(RTLIB::Libcall Call) const { + return Libcalls.getSoftFloatCmpLibcallPredicate(Call); } - /// Set the CallingConv that should be used for the specified libcall. void setLibcallCallingConv(RTLIB::Libcall Call, CallingConv::ID CC) { Libcalls.setLibcallCallingConv(Call, CC); diff --git a/llvm/include/llvm/IR/RuntimeLibcalls.h b/llvm/include/llvm/IR/RuntimeLibcalls.h index 89e466ee5933d..e5adcd33411c5 100644 --- a/llvm/include/llvm/IR/RuntimeLibcalls.h +++ b/llvm/include/llvm/IR/RuntimeLibcalls.h @@ -17,6 +17,7 @@ #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/Sequence.h" #include "llvm/IR/CallingConv.h" +#include "llvm/IR/InstrTypes.h" #include "llvm/Support/AtomicOrdering.h" #include "llvm/Support/Compiler.h" #include "llvm/TargetParser/Triple.h" @@ -86,6 +87,20 @@ struct RuntimeLibcallsInfo { LibcallRoutineNames + RTLIB::UNKNOWN_LIBCALL); } + /// Get the comparison predicate that's to be used to test the result of the + /// comparison libcall against zero. This should only be used with + /// floating-point compare libcalls. + CmpInst::Predicate + getSoftFloatCmpLibcallPredicate(RTLIB::Libcall Call) const { + return SoftFloatCompareLibcallPredicates[Call]; + } + + // FIXME: This should be removed. This should be private constant. + void setSoftFloatCmpLibcallPredicate(RTLIB::Libcall Call, + CmpInst::Predicate Pred) { + SoftFloatCompareLibcallPredicates[Call] = Pred; + } + private: /// Stores the name each libcall. const char *LibcallRoutineNames[RTLIB::UNKNOWN_LIBCALL + 1]; @@ -93,6 +108,14 @@ struct RuntimeLibcallsInfo { /// Stores the CallingConv that should be used for each libcall. CallingConv::ID LibcallCallingConvs[RTLIB::UNKNOWN_LIBCALL]; + /// The condition type that should be used to test the result of each of the + /// soft floating-point comparison libcall against integer zero. + /// + // FIXME: This is only relevant for the handful of floating-point comparison + // runtime calls; it's excessive to have a table entry for every single + // opcode. + CmpInst::Predicate SoftFloatCompareLibcallPredicates[RTLIB::UNKNOWN_LIBCALL]; + static bool darwinHasSinCos(const Triple &TT) { assert(TT.isOSDarwin() && "should be called with darwin triple"); // Don't bother with 32 bit x86. @@ -108,6 +131,8 @@ struct RuntimeLibcallsInfo { return true; } + void initSoftFloatCmpLibcallPredicates(); + /// Set default libcall names. If a target wants to opt-out of a libcall it /// should be placed here. LLVM_ABI void initLibcalls(const Triple &TT); diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 4472a031c39f6..5105c4a515fbe 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -14,6 +14,7 @@ #include "llvm/ADT/STLExtras.h" #include "llvm/Analysis/ValueTracking.h" #include "llvm/Analysis/VectorUtils.h" +#include "llvm/CodeGen/Analysis.h" #include "llvm/CodeGen/CallingConvLower.h" #include "llvm/CodeGen/CodeGenCommonISel.h" #include "llvm/CodeGen/MachineFrameInfo.h" @@ -419,7 +420,7 @@ void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT, NewLHS = Call.first; NewRHS = DAG.getConstant(0, dl, RetVT); - CCCode = getCmpLibcallCC(LC1); + CCCode = getICmpCondCode(getSoftFloatCmpLibcallPredicate(LC1)); if (ShouldInvertCC) { assert(RetVT.isInteger()); CCCode = getSetCCInverse(CCCode, RetVT); @@ -441,7 +442,7 @@ void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT, SDValue Tmp = DAG.getSetCC(dl, SetCCVT, NewLHS, NewRHS, CCCode); auto Call2 = makeLibCall(DAG, LC2, RetVT, Ops, CallOptions, dl, Chain); - CCCode = getCmpLibcallCC(LC2); + CCCode = getICmpCondCode(getSoftFloatCmpLibcallPredicate(LC2)); if (ShouldInvertCC) CCCode = getSetCCInverse(CCCode, RetVT); NewLHS = DAG.getSetCC(dl, SetCCVT, Call2.first, NewRHS, CCCode); diff --git a/llvm/lib/IR/RuntimeLibcalls.cpp b/llvm/lib/IR/RuntimeLibcalls.cpp index 6c093df974693..586b9721cdd32 100644 --- a/llvm/lib/IR/RuntimeLibcalls.cpp +++ b/llvm/lib/IR/RuntimeLibcalls.cpp @@ -11,12 +11,48 @@ using namespace llvm; using namespace RTLIB; +void RuntimeLibcallsInfo::initSoftFloatCmpLibcallPredicates() { + std::fill(SoftFloatCompareLibcallPredicates, + SoftFloatCompareLibcallPredicates + RTLIB::UNKNOWN_LIBCALL, + CmpInst::BAD_ICMP_PREDICATE); + SoftFloatCompareLibcallPredicates[RTLIB::OEQ_F32] = CmpInst::ICMP_EQ; + SoftFloatCompareLibcallPredicates[RTLIB::OEQ_F64] = CmpInst::ICMP_EQ; + SoftFloatCompareLibcallPredicates[RTLIB::OEQ_F128] = CmpInst::ICMP_EQ; + SoftFloatCompareLibcallPredicates[RTLIB::OEQ_PPCF128] = CmpInst::ICMP_EQ; + SoftFloatCompareLibcallPredicates[RTLIB::UNE_F32] = CmpInst::ICMP_NE; + SoftFloatCompareLibcallPredicates[RTLIB::UNE_F64] = CmpInst::ICMP_NE; + SoftFloatCompareLibcallPredicates[RTLIB::UNE_F128] = CmpInst::ICMP_NE; + SoftFloatCompareLibcallPredicates[RTLIB::UNE_PPCF128] = CmpInst::ICMP_NE; + SoftFloatCompareLibcallPredicates[RTLIB::OGE_F32] = CmpInst::ICMP_SGE; + SoftFloatCompareLibcallPredicates[RTLIB::OGE_F64] = CmpInst::ICMP_SGE; + SoftFloatCompareLibcallPredicates[RTLIB::OGE_F128] = CmpInst::ICMP_SGE; + SoftFloatCompareLibcallPredicates[RTLIB::OGE_PPCF128] = CmpInst::ICMP_SGE; + SoftFloatCompareLibcallPredicates[RTLIB::OLT_F32] = CmpInst::ICMP_SLT; + SoftFloatCompareLibcallPredicates[RTLIB::OLT_F64] = CmpInst::ICMP_SLT; + SoftFloatCompareLibcallPredicates[RTLIB::OLT_F128] = CmpInst::ICMP_SLT; + SoftFloatCompareLibcallPredicates[RTLIB::OLT_PPCF128] = CmpInst::ICMP_SLT; + SoftFloatCompareLibcallPredicates[RTLIB::OLE_F32] = CmpInst::ICMP_SLE; + SoftFloatCompareLibcallPredicates[RTLIB::OLE_F64] = CmpInst::ICMP_SLE; + SoftFloatCompareLibcallPredicates[RTLIB::OLE_F128] = CmpInst::ICMP_SLE; + SoftFloatCompareLibcallPredicates[RTLIB::OLE_PPCF128] = CmpInst::ICMP_SLE; + SoftFloatCompareLibcallPredicates[RTLIB::OGT_F32] = CmpInst::ICMP_SGT; + SoftFloatCompareLibcallPredicates[RTLIB::OGT_F64] = CmpInst::ICMP_SGT; + SoftFloatCompareLibcallPredicates[RTLIB::OGT_F128] = CmpInst::ICMP_SGT; + SoftFloatCompareLibcallPredicates[RTLIB::OGT_PPCF128] = CmpInst::ICMP_SGT; + SoftFloatCompareLibcallPredicates[RTLIB::UO_F32] = CmpInst::ICMP_NE; + SoftFloatCompareLibcallPredicates[RTLIB::UO_F64] = CmpInst::ICMP_NE; + SoftFloatCompareLibcallPredicates[RTLIB::UO_F128] = CmpInst::ICMP_NE; + SoftFloatCompareLibcallPredicates[RTLIB::UO_PPCF128] = CmpInst::ICMP_NE; +} + /// Set default libcall names. If a target wants to opt-out of a libcall it /// should be placed here. void RuntimeLibcallsInfo::initLibcalls(const Triple &TT) { std::fill(std::begin(LibcallRoutineNames), std::end(LibcallRoutineNames), nullptr); + initSoftFloatCmpLibcallPredicates(); + #define HANDLE_LIBCALL(code, name) setLibcallName(RTLIB::code, name); #include "llvm/IR/RuntimeLibcalls.def" #undef HANDLE_LIBCALL diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index c2e5805b827d0..67f6583d3e6b9 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -525,64 +525,64 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM, static const struct { const RTLIB::Libcall Op; const char * const Name; - const ISD::CondCode Cond; + const CmpInst::Predicate Cond; } LibraryCalls[] = { // Single-precision floating-point arithmetic. - { RTLIB::ADD_F32, "__addsf3vfp", ISD::SETCC_INVALID }, - { RTLIB::SUB_F32, "__subsf3vfp", ISD::SETCC_INVALID }, - { RTLIB::MUL_F32, "__mulsf3vfp", ISD::SETCC_INVALID }, - { RTLIB::DIV_F32, "__divsf3vfp", ISD::SETCC_INVALID }, + { RTLIB::ADD_F32, "__addsf3vfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SUB_F32, "__subsf3vfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::MUL_F32, "__mulsf3vfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::DIV_F32, "__divsf3vfp", CmpInst::BAD_ICMP_PREDICATE }, // Double-precision floating-point arithmetic. - { RTLIB::ADD_F64, "__adddf3vfp", ISD::SETCC_INVALID }, - { RTLIB::SUB_F64, "__subdf3vfp", ISD::SETCC_INVALID }, - { RTLIB::MUL_F64, "__muldf3vfp", ISD::SETCC_INVALID }, - { RTLIB::DIV_F64, "__divdf3vfp", ISD::SETCC_INVALID }, + { RTLIB::ADD_F64, "__adddf3vfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SUB_F64, "__subdf3vfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::MUL_F64, "__muldf3vfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::DIV_F64, "__divdf3vfp", CmpInst::BAD_ICMP_PREDICATE }, // Single-precision comparisons. - { RTLIB::OEQ_F32, "__eqsf2vfp", ISD::SETNE }, - { RTLIB::UNE_F32, "__nesf2vfp", ISD::SETNE }, - { RTLIB::OLT_F32, "__ltsf2vfp", ISD::SETNE }, - { RTLIB::OLE_F32, "__lesf2vfp", ISD::SETNE }, - { RTLIB::OGE_F32, "__gesf2vfp", ISD::SETNE }, - { RTLIB::OGT_F32, "__gtsf2vfp", ISD::SETNE }, - { RTLIB::UO_F32, "__unordsf2vfp", ISD::SETNE }, + { RTLIB::OEQ_F32, "__eqsf2vfp", CmpInst::ICMP_NE }, + { RTLIB::UNE_F32, "__nesf2vfp", CmpInst::ICMP_NE }, + { RTLIB::OLT_F32, "__ltsf2vfp", CmpInst::ICMP_NE }, + { RTLIB::OLE_F32, "__lesf2vfp", CmpInst::ICMP_NE }, + { RTLIB::OGE_F32, "__gesf2vfp", CmpInst::ICMP_NE }, + { RTLIB::OGT_F32, "__gtsf2vfp", CmpInst::ICMP_NE }, + { RTLIB::UO_F32, "__unordsf2vfp", CmpInst::ICMP_NE }, // Double-precision comparisons. - { RTLIB::OEQ_F64, "__eqdf2vfp", ISD::SETNE }, - { RTLIB::UNE_F64, "__nedf2vfp", ISD::SETNE }, - { RTLIB::OLT_F64, "__ltdf2vfp", ISD::SETNE }, - { RTLIB::OLE_F64, "__ledf2vfp", ISD::SETNE }, - { RTLIB::OGE_F64, "__gedf2vfp", ISD::SETNE }, - { RTLIB::OGT_F64, "__gtdf2vfp", ISD::SETNE }, - { RTLIB::UO_F64, "__unorddf2vfp", ISD::SETNE }, + { RTLIB::OEQ_F64, "__eqdf2vfp", CmpInst::ICMP_NE }, + { RTLIB::UNE_F64, "__nedf2vfp", CmpInst::ICMP_NE }, + { RTLIB::OLT_F64, "__ltdf2vfp", CmpInst::ICMP_NE }, + { RTLIB::OLE_F64, "__ledf2vfp", CmpInst::ICMP_NE }, + { RTLIB::OGE_F64, "__gedf2vfp", CmpInst::ICMP_NE }, + { RTLIB::OGT_F64, "__gtdf2vfp", CmpInst::ICMP_NE }, + { RTLIB::UO_F64, "__unorddf2vfp", CmpInst::ICMP_NE }, // Floating-point to integer conversions. // i64 conversions are done via library routines even when generating VFP // instructions, so use the same ones. - { RTLIB::FPTOSINT_F64_I32, "__fixdfsivfp", ISD::SETCC_INVALID }, - { RTLIB::FPTOUINT_F64_I32, "__fixunsdfsivfp", ISD::SETCC_INVALID }, - { RTLIB::FPTOSINT_F32_I32, "__fixsfsivfp", ISD::SETCC_INVALID }, - { RTLIB::FPTOUINT_F32_I32, "__fixunssfsivfp", ISD::SETCC_INVALID }, + { RTLIB::FPTOSINT_F64_I32, "__fixdfsivfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOUINT_F64_I32, "__fixunsdfsivfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOSINT_F32_I32, "__fixsfsivfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOUINT_F32_I32, "__fixunssfsivfp", CmpInst::BAD_ICMP_PREDICATE }, // Conversions between floating types. - { RTLIB::FPROUND_F64_F32, "__truncdfsf2vfp", ISD::SETCC_INVALID }, - { RTLIB::FPEXT_F32_F64, "__extendsfdf2vfp", ISD::SETCC_INVALID }, + { RTLIB::FPROUND_F64_F32, "__truncdfsf2vfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPEXT_F32_F64, "__extendsfdf2vfp", CmpInst::BAD_ICMP_PREDICATE }, // Integer to floating-point conversions. // i64 conversions are done via library routines even when generating VFP // instructions, so use the same ones. // FIXME: There appears to be some naming inconsistency in ARM libgcc: // e.g., __floatunsidf vs. __floatunssidfvfp. - { RTLIB::SINTTOFP_I32_F64, "__floatsidfvfp", ISD::SETCC_INVALID }, - { RTLIB::UINTTOFP_I32_F64, "__floatunssidfvfp", ISD::SETCC_INVALID }, - { RTLIB::SINTTOFP_I32_F32, "__floatsisfvfp", ISD::SETCC_INVALID }, - { RTLIB::UINTTOFP_I32_F32, "__floatunssisfvfp", ISD::SETCC_INVALID }, + { RTLIB::SINTTOFP_I32_F64, "__floatsidfvfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UINTTOFP_I32_F64, "__floatunssidfvfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SINTTOFP_I32_F32, "__floatsisfvfp", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UINTTOFP_I32_F32, "__floatunssisfvfp", CmpInst::BAD_ICMP_PREDICATE }, }; for (const auto &LC : LibraryCalls) { setLibcallName(LC.Op, LC.Name); - if (LC.Cond != ISD::SETCC_INVALID) + if (LC.Cond != CmpInst::BAD_ICMP_PREDICATE) setCmpLibcallCC(LC.Op, LC.Cond); } } @@ -596,93 +596,93 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM, const RTLIB::Libcall Op; const char * const Name; const CallingConv::ID CC; - const ISD::CondCode Cond; + const CmpInst::Predicate Cond; } LibraryCalls[] = { // Double-precision floating-point arithmetic helper functions // RTABI chapter 4.1.2, Table 2 - { RTLIB::ADD_F64, "__aeabi_dadd", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::DIV_F64, "__aeabi_ddiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::MUL_F64, "__aeabi_dmul", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::SUB_F64, "__aeabi_dsub", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, + { RTLIB::ADD_F64, "__aeabi_dadd", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::DIV_F64, "__aeabi_ddiv", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::MUL_F64, "__aeabi_dmul", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SUB_F64, "__aeabi_dsub", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, // Double-precision floating-point comparison helper functions // RTABI chapter 4.1.2, Table 3 - { RTLIB::OEQ_F64, "__aeabi_dcmpeq", CallingConv::ARM_AAPCS, ISD::SETNE }, - { RTLIB::UNE_F64, "__aeabi_dcmpeq", CallingConv::ARM_AAPCS, ISD::SETEQ }, - { RTLIB::OLT_F64, "__aeabi_dcmplt", CallingConv::ARM_AAPCS, ISD::SETNE }, - { RTLIB::OLE_F64, "__aeabi_dcmple", CallingConv::ARM_AAPCS, ISD::SETNE }, - { RTLIB::OGE_F64, "__aeabi_dcmpge", CallingConv::ARM_AAPCS, ISD::SETNE }, - { RTLIB::OGT_F64, "__aeabi_dcmpgt", CallingConv::ARM_AAPCS, ISD::SETNE }, - { RTLIB::UO_F64, "__aeabi_dcmpun", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, + { RTLIB::OEQ_F64, "__aeabi_dcmpeq", CallingConv::ARM_AAPCS, CmpInst::ICMP_NE }, + { RTLIB::UNE_F64, "__aeabi_dcmpeq", CallingConv::ARM_AAPCS, CmpInst::ICMP_EQ }, + { RTLIB::OLT_F64, "__aeabi_dcmplt", CallingConv::ARM_AAPCS, CmpInst::ICMP_NE }, + { RTLIB::OLE_F64, "__aeabi_dcmple", CallingConv::ARM_AAPCS, CmpInst::ICMP_NE }, + { RTLIB::OGE_F64, "__aeabi_dcmpge", CallingConv::ARM_AAPCS, CmpInst::ICMP_NE }, + { RTLIB::OGT_F64, "__aeabi_dcmpgt", CallingConv::ARM_AAPCS, CmpInst::ICMP_NE }, + { RTLIB::UO_F64, "__aeabi_dcmpun", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, // Single-precision floating-point arithmetic helper functions // RTABI chapter 4.1.2, Table 4 - { RTLIB::ADD_F32, "__aeabi_fadd", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::DIV_F32, "__aeabi_fdiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::MUL_F32, "__aeabi_fmul", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::SUB_F32, "__aeabi_fsub", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, + { RTLIB::ADD_F32, "__aeabi_fadd", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::DIV_F32, "__aeabi_fdiv", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::MUL_F32, "__aeabi_fmul", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SUB_F32, "__aeabi_fsub", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, // Single-precision floating-point comparison helper functions // RTABI chapter 4.1.2, Table 5 - { RTLIB::OEQ_F32, "__aeabi_fcmpeq", CallingConv::ARM_AAPCS, ISD::SETNE }, - { RTLIB::UNE_F32, "__aeabi_fcmpeq", CallingConv::ARM_AAPCS, ISD::SETEQ }, - { RTLIB::OLT_F32, "__aeabi_fcmplt", CallingConv::ARM_AAPCS, ISD::SETNE }, - { RTLIB::OLE_F32, "__aeabi_fcmple", CallingConv::ARM_AAPCS, ISD::SETNE }, - { RTLIB::OGE_F32, "__aeabi_fcmpge", CallingConv::ARM_AAPCS, ISD::SETNE }, - { RTLIB::OGT_F32, "__aeabi_fcmpgt", CallingConv::ARM_AAPCS, ISD::SETNE }, - { RTLIB::UO_F32, "__aeabi_fcmpun", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, + { RTLIB::OEQ_F32, "__aeabi_fcmpeq", CallingConv::ARM_AAPCS, CmpInst::ICMP_NE }, + { RTLIB::UNE_F32, "__aeabi_fcmpeq", CallingConv::ARM_AAPCS, CmpInst::ICMP_EQ }, + { RTLIB::OLT_F32, "__aeabi_fcmplt", CallingConv::ARM_AAPCS, CmpInst::ICMP_NE }, + { RTLIB::OLE_F32, "__aeabi_fcmple", CallingConv::ARM_AAPCS, CmpInst::ICMP_NE }, + { RTLIB::OGE_F32, "__aeabi_fcmpge", CallingConv::ARM_AAPCS, CmpInst::ICMP_NE }, + { RTLIB::OGT_F32, "__aeabi_fcmpgt", CallingConv::ARM_AAPCS, CmpInst::ICMP_NE }, + { RTLIB::UO_F32, "__aeabi_fcmpun", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, // Floating-point to integer conversions. // RTABI chapter 4.1.2, Table 6 - { RTLIB::FPTOSINT_F64_I32, "__aeabi_d2iz", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::FPTOUINT_F64_I32, "__aeabi_d2uiz", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::FPTOSINT_F64_I64, "__aeabi_d2lz", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::FPTOUINT_F64_I64, "__aeabi_d2ulz", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::FPTOSINT_F32_I32, "__aeabi_f2iz", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::FPTOUINT_F32_I32, "__aeabi_f2uiz", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::FPTOSINT_F32_I64, "__aeabi_f2lz", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::FPTOUINT_F32_I64, "__aeabi_f2ulz", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, + { RTLIB::FPTOSINT_F64_I32, "__aeabi_d2iz", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOUINT_F64_I32, "__aeabi_d2uiz", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOSINT_F64_I64, "__aeabi_d2lz", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOUINT_F64_I64, "__aeabi_d2ulz", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOSINT_F32_I32, "__aeabi_f2iz", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOUINT_F32_I32, "__aeabi_f2uiz", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOSINT_F32_I64, "__aeabi_f2lz", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOUINT_F32_I64, "__aeabi_f2ulz", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, // Conversions between floating types. // RTABI chapter 4.1.2, Table 7 - { RTLIB::FPROUND_F64_F32, "__aeabi_d2f", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::FPROUND_F64_F16, "__aeabi_d2h", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::FPEXT_F32_F64, "__aeabi_f2d", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, + { RTLIB::FPROUND_F64_F32, "__aeabi_d2f", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPROUND_F64_F16, "__aeabi_d2h", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPEXT_F32_F64, "__aeabi_f2d", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, // Integer to floating-point conversions. // RTABI chapter 4.1.2, Table 8 - { RTLIB::SINTTOFP_I32_F64, "__aeabi_i2d", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::UINTTOFP_I32_F64, "__aeabi_ui2d", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::SINTTOFP_I64_F64, "__aeabi_l2d", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::UINTTOFP_I64_F64, "__aeabi_ul2d", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::SINTTOFP_I32_F32, "__aeabi_i2f", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::UINTTOFP_I32_F32, "__aeabi_ui2f", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::SINTTOFP_I64_F32, "__aeabi_l2f", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::UINTTOFP_I64_F32, "__aeabi_ul2f", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, + { RTLIB::SINTTOFP_I32_F64, "__aeabi_i2d", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UINTTOFP_I32_F64, "__aeabi_ui2d", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SINTTOFP_I64_F64, "__aeabi_l2d", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UINTTOFP_I64_F64, "__aeabi_ul2d", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SINTTOFP_I32_F32, "__aeabi_i2f", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UINTTOFP_I32_F32, "__aeabi_ui2f", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SINTTOFP_I64_F32, "__aeabi_l2f", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UINTTOFP_I64_F32, "__aeabi_ul2f", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, // Long long helper functions // RTABI chapter 4.2, Table 9 - { RTLIB::MUL_I64, "__aeabi_lmul", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::SHL_I64, "__aeabi_llsl", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::SRL_I64, "__aeabi_llsr", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::SRA_I64, "__aeabi_lasr", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, + { RTLIB::MUL_I64, "__aeabi_lmul", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SHL_I64, "__aeabi_llsl", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SRL_I64, "__aeabi_llsr", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SRA_I64, "__aeabi_lasr", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, // Integer division functions // RTABI chapter 4.3.1 - { RTLIB::SDIV_I8, "__aeabi_idiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::SDIV_I16, "__aeabi_idiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::SDIV_I32, "__aeabi_idiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::SDIV_I64, "__aeabi_ldivmod", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::UDIV_I8, "__aeabi_uidiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::UDIV_I16, "__aeabi_uidiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::UDIV_I32, "__aeabi_uidiv", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, - { RTLIB::UDIV_I64, "__aeabi_uldivmod", CallingConv::ARM_AAPCS, ISD::SETCC_INVALID }, + { RTLIB::SDIV_I8, "__aeabi_idiv", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SDIV_I16, "__aeabi_idiv", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SDIV_I32, "__aeabi_idiv", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SDIV_I64, "__aeabi_ldivmod", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UDIV_I8, "__aeabi_uidiv", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UDIV_I16, "__aeabi_uidiv", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UDIV_I32, "__aeabi_uidiv", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UDIV_I64, "__aeabi_uldivmod", CallingConv::ARM_AAPCS, CmpInst::BAD_ICMP_PREDICATE }, }; for (const auto &LC : LibraryCalls) { setLibcallName(LC.Op, LC.Name); setLibcallCallingConv(LC.Op, LC.CC); - if (LC.Cond != ISD::SETCC_INVALID) + if (LC.Cond != CmpInst::BAD_ICMP_PREDICATE) setCmpLibcallCC(LC.Op, LC.Cond); } diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp index 5589cea6e675d..7af186edfb31a 100644 --- a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -152,101 +152,101 @@ MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM, const struct { const RTLIB::Libcall Op; const char * const Name; - const ISD::CondCode Cond; + const CmpInst::Predicate Cond; } LibraryCalls[] = { // Floating point conversions - EABI Table 6 - { RTLIB::FPROUND_F64_F32, "__mspabi_cvtdf", ISD::SETCC_INVALID }, - { RTLIB::FPEXT_F32_F64, "__mspabi_cvtfd", ISD::SETCC_INVALID }, + { RTLIB::FPROUND_F64_F32, "__mspabi_cvtdf", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPEXT_F32_F64, "__mspabi_cvtfd", CmpInst::BAD_ICMP_PREDICATE }, // The following is NOT implemented in libgcc - //{ RTLIB::FPTOSINT_F64_I16, "__mspabi_fixdi", ISD::SETCC_INVALID }, - { RTLIB::FPTOSINT_F64_I32, "__mspabi_fixdli", ISD::SETCC_INVALID }, - { RTLIB::FPTOSINT_F64_I64, "__mspabi_fixdlli", ISD::SETCC_INVALID }, + //{ RTLIB::FPTOSINT_F64_I16, "__mspabi_fixdi", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOSINT_F64_I32, "__mspabi_fixdli", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOSINT_F64_I64, "__mspabi_fixdlli", CmpInst::BAD_ICMP_PREDICATE }, // The following is NOT implemented in libgcc - //{ RTLIB::FPTOUINT_F64_I16, "__mspabi_fixdu", ISD::SETCC_INVALID }, - { RTLIB::FPTOUINT_F64_I32, "__mspabi_fixdul", ISD::SETCC_INVALID }, - { RTLIB::FPTOUINT_F64_I64, "__mspabi_fixdull", ISD::SETCC_INVALID }, + //{ RTLIB::FPTOUINT_F64_I16, "__mspabi_fixdu", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOUINT_F64_I32, "__mspabi_fixdul", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOUINT_F64_I64, "__mspabi_fixdull", CmpInst::BAD_ICMP_PREDICATE }, // The following is NOT implemented in libgcc - //{ RTLIB::FPTOSINT_F32_I16, "__mspabi_fixfi", ISD::SETCC_INVALID }, - { RTLIB::FPTOSINT_F32_I32, "__mspabi_fixfli", ISD::SETCC_INVALID }, - { RTLIB::FPTOSINT_F32_I64, "__mspabi_fixflli", ISD::SETCC_INVALID }, + //{ RTLIB::FPTOSINT_F32_I16, "__mspabi_fixfi", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOSINT_F32_I32, "__mspabi_fixfli", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOSINT_F32_I64, "__mspabi_fixflli", CmpInst::BAD_ICMP_PREDICATE }, // The following is NOT implemented in libgcc - //{ RTLIB::FPTOUINT_F32_I16, "__mspabi_fixfu", ISD::SETCC_INVALID }, - { RTLIB::FPTOUINT_F32_I32, "__mspabi_fixful", ISD::SETCC_INVALID }, - { RTLIB::FPTOUINT_F32_I64, "__mspabi_fixfull", ISD::SETCC_INVALID }, + //{ RTLIB::FPTOUINT_F32_I16, "__mspabi_fixfu", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOUINT_F32_I32, "__mspabi_fixful", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::FPTOUINT_F32_I64, "__mspabi_fixfull", CmpInst::BAD_ICMP_PREDICATE }, // TODO The following IS implemented in libgcc - //{ RTLIB::SINTTOFP_I16_F64, "__mspabi_fltid", ISD::SETCC_INVALID }, - { RTLIB::SINTTOFP_I32_F64, "__mspabi_fltlid", ISD::SETCC_INVALID }, + //{ RTLIB::SINTTOFP_I16_F64, "__mspabi_fltid", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SINTTOFP_I32_F64, "__mspabi_fltlid", CmpInst::BAD_ICMP_PREDICATE }, // TODO The following IS implemented in libgcc but is not in the EABI - { RTLIB::SINTTOFP_I64_F64, "__mspabi_fltllid", ISD::SETCC_INVALID }, + { RTLIB::SINTTOFP_I64_F64, "__mspabi_fltllid", CmpInst::BAD_ICMP_PREDICATE }, // TODO The following IS implemented in libgcc - //{ RTLIB::UINTTOFP_I16_F64, "__mspabi_fltud", ISD::SETCC_INVALID }, - { RTLIB::UINTTOFP_I32_F64, "__mspabi_fltuld", ISD::SETCC_INVALID }, + //{ RTLIB::UINTTOFP_I16_F64, "__mspabi_fltud", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UINTTOFP_I32_F64, "__mspabi_fltuld", CmpInst::BAD_ICMP_PREDICATE }, // The following IS implemented in libgcc but is not in the EABI - { RTLIB::UINTTOFP_I64_F64, "__mspabi_fltulld", ISD::SETCC_INVALID }, + { RTLIB::UINTTOFP_I64_F64, "__mspabi_fltulld", CmpInst::BAD_ICMP_PREDICATE }, // TODO The following IS implemented in libgcc - //{ RTLIB::SINTTOFP_I16_F32, "__mspabi_fltif", ISD::SETCC_INVALID }, - { RTLIB::SINTTOFP_I32_F32, "__mspabi_fltlif", ISD::SETCC_INVALID }, + //{ RTLIB::SINTTOFP_I16_F32, "__mspabi_fltif", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SINTTOFP_I32_F32, "__mspabi_fltlif", CmpInst::BAD_ICMP_PREDICATE }, // TODO The following IS implemented in libgcc but is not in the EABI - { RTLIB::SINTTOFP_I64_F32, "__mspabi_fltllif", ISD::SETCC_INVALID }, + { RTLIB::SINTTOFP_I64_F32, "__mspabi_fltllif", CmpInst::BAD_ICMP_PREDICATE }, // TODO The following IS implemented in libgcc - //{ RTLIB::UINTTOFP_I16_F32, "__mspabi_fltuf", ISD::SETCC_INVALID }, - { RTLIB::UINTTOFP_I32_F32, "__mspabi_fltulf", ISD::SETCC_INVALID }, + //{ RTLIB::UINTTOFP_I16_F32, "__mspabi_fltuf", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UINTTOFP_I32_F32, "__mspabi_fltulf", CmpInst::BAD_ICMP_PREDICATE }, // The following IS implemented in libgcc but is not in the EABI - { RTLIB::UINTTOFP_I64_F32, "__mspabi_fltullf", ISD::SETCC_INVALID }, + { RTLIB::UINTTOFP_I64_F32, "__mspabi_fltullf", CmpInst::BAD_ICMP_PREDICATE }, // Floating point comparisons - EABI Table 7 - { RTLIB::OEQ_F64, "__mspabi_cmpd", ISD::SETEQ }, - { RTLIB::UNE_F64, "__mspabi_cmpd", ISD::SETNE }, - { RTLIB::OGE_F64, "__mspabi_cmpd", ISD::SETGE }, - { RTLIB::OLT_F64, "__mspabi_cmpd", ISD::SETLT }, - { RTLIB::OLE_F64, "__mspabi_cmpd", ISD::SETLE }, - { RTLIB::OGT_F64, "__mspabi_cmpd", ISD::SETGT }, - { RTLIB::OEQ_F32, "__mspabi_cmpf", ISD::SETEQ }, - { RTLIB::UNE_F32, "__mspabi_cmpf", ISD::SETNE }, - { RTLIB::OGE_F32, "__mspabi_cmpf", ISD::SETGE }, - { RTLIB::OLT_F32, "__mspabi_cmpf", ISD::SETLT }, - { RTLIB::OLE_F32, "__mspabi_cmpf", ISD::SETLE }, - { RTLIB::OGT_F32, "__mspabi_cmpf", ISD::SETGT }, + { RTLIB::OEQ_F64, "__mspabi_cmpd", CmpInst::ICMP_EQ }, + { RTLIB::UNE_F64, "__mspabi_cmpd", CmpInst::ICMP_NE }, + { RTLIB::OGE_F64, "__mspabi_cmpd", CmpInst::ICMP_SGE }, + { RTLIB::OLT_F64, "__mspabi_cmpd", CmpInst::ICMP_SLT }, + { RTLIB::OLE_F64, "__mspabi_cmpd", CmpInst::ICMP_SLE }, + { RTLIB::OGT_F64, "__mspabi_cmpd", CmpInst::ICMP_SGT }, + { RTLIB::OEQ_F32, "__mspabi_cmpf", CmpInst::ICMP_EQ }, + { RTLIB::UNE_F32, "__mspabi_cmpf", CmpInst::ICMP_NE }, + { RTLIB::OGE_F32, "__mspabi_cmpf", CmpInst::ICMP_SGE }, + { RTLIB::OLT_F32, "__mspabi_cmpf", CmpInst::ICMP_SLT }, + { RTLIB::OLE_F32, "__mspabi_cmpf", CmpInst::ICMP_SLE }, + { RTLIB::OGT_F32, "__mspabi_cmpf", CmpInst::ICMP_SGT }, // Floating point arithmetic - EABI Table 8 - { RTLIB::ADD_F64, "__mspabi_addd", ISD::SETCC_INVALID }, - { RTLIB::ADD_F32, "__mspabi_addf", ISD::SETCC_INVALID }, - { RTLIB::DIV_F64, "__mspabi_divd", ISD::SETCC_INVALID }, - { RTLIB::DIV_F32, "__mspabi_divf", ISD::SETCC_INVALID }, - { RTLIB::MUL_F64, "__mspabi_mpyd", ISD::SETCC_INVALID }, - { RTLIB::MUL_F32, "__mspabi_mpyf", ISD::SETCC_INVALID }, - { RTLIB::SUB_F64, "__mspabi_subd", ISD::SETCC_INVALID }, - { RTLIB::SUB_F32, "__mspabi_subf", ISD::SETCC_INVALID }, + { RTLIB::ADD_F64, "__mspabi_addd", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::ADD_F32, "__mspabi_addf", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::DIV_F64, "__mspabi_divd", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::DIV_F32, "__mspabi_divf", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::MUL_F64, "__mspabi_mpyd", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::MUL_F32, "__mspabi_mpyf", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SUB_F64, "__mspabi_subd", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SUB_F32, "__mspabi_subf", CmpInst::BAD_ICMP_PREDICATE }, // The following are NOT implemented in libgcc - // { RTLIB::NEG_F64, "__mspabi_negd", ISD::SETCC_INVALID }, - // { RTLIB::NEG_F32, "__mspabi_negf", ISD::SETCC_INVALID }, + // { RTLIB::NEG_F64, "__mspabi_negd", CmpInst::BAD_ICMP_PREDICATE }, + // { RTLIB::NEG_F32, "__mspabi_negf", CmpInst::BAD_ICMP_PREDICATE }, // Universal Integer Operations - EABI Table 9 - { RTLIB::SDIV_I16, "__mspabi_divi", ISD::SETCC_INVALID }, - { RTLIB::SDIV_I32, "__mspabi_divli", ISD::SETCC_INVALID }, - { RTLIB::SDIV_I64, "__mspabi_divlli", ISD::SETCC_INVALID }, - { RTLIB::UDIV_I16, "__mspabi_divu", ISD::SETCC_INVALID }, - { RTLIB::UDIV_I32, "__mspabi_divul", ISD::SETCC_INVALID }, - { RTLIB::UDIV_I64, "__mspabi_divull", ISD::SETCC_INVALID }, - { RTLIB::SREM_I16, "__mspabi_remi", ISD::SETCC_INVALID }, - { RTLIB::SREM_I32, "__mspabi_remli", ISD::SETCC_INVALID }, - { RTLIB::SREM_I64, "__mspabi_remlli", ISD::SETCC_INVALID }, - { RTLIB::UREM_I16, "__mspabi_remu", ISD::SETCC_INVALID }, - { RTLIB::UREM_I32, "__mspabi_remul", ISD::SETCC_INVALID }, - { RTLIB::UREM_I64, "__mspabi_remull", ISD::SETCC_INVALID }, + { RTLIB::SDIV_I16, "__mspabi_divi", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SDIV_I32, "__mspabi_divli", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SDIV_I64, "__mspabi_divlli", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UDIV_I16, "__mspabi_divu", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UDIV_I32, "__mspabi_divul", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UDIV_I64, "__mspabi_divull", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SREM_I16, "__mspabi_remi", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SREM_I32, "__mspabi_remli", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SREM_I64, "__mspabi_remlli", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UREM_I16, "__mspabi_remu", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UREM_I32, "__mspabi_remul", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::UREM_I64, "__mspabi_remull", CmpInst::BAD_ICMP_PREDICATE }, // Bitwise Operations - EABI Table 10 // TODO: __mspabi_[srli/srai/slli] ARE implemented in libgcc - { RTLIB::SRL_I32, "__mspabi_srll", ISD::SETCC_INVALID }, - { RTLIB::SRA_I32, "__mspabi_sral", ISD::SETCC_INVALID }, - { RTLIB::SHL_I32, "__mspabi_slll", ISD::SETCC_INVALID }, + { RTLIB::SRL_I32, "__mspabi_srll", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SRA_I32, "__mspabi_sral", CmpInst::BAD_ICMP_PREDICATE }, + { RTLIB::SHL_I32, "__mspabi_slll", CmpInst::BAD_ICMP_PREDICATE }, // __mspabi_[srlll/srall/sllll/rlli/rlll] are NOT implemented in libgcc }; for (const auto &LC : LibraryCalls) { setLibcallName(LC.Op, LC.Name); - if (LC.Cond != ISD::SETCC_INVALID) + if (LC.Cond != CmpInst::BAD_ICMP_PREDICATE) setCmpLibcallCC(LC.Op, LC.Cond); } _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits