https://github.com/tru updated https://github.com/llvm/llvm-project/pull/149246
>From 7c2c20dd9c3e90772b06973fdc235971c31f3955 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <matthew.arsena...@amd.com>
Date: Thu, 17 Jul 2025 08:29:09 +0900
Subject: [PATCH] RuntimeLibcalls: Fix calling conv of win32 div libcalls
(#149098)
There's probably an existing test this should be added to,
but our test coverage is really bad that this wasn't caught
by one.
(cherry picked from commit 0110168f6aa5c8a8d02ffd9e62c7929ce6d24d26)
---
llvm/include/llvm/IR/RuntimeLibcalls.td | 2 +-
.../CodeGen/X86/win32-int-runtime-libcalls.ll | 113 ++++++++++++++++++
2 files changed, 114 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/CodeGen/X86/win32-int-runtime-libcalls.ll
diff --git a/llvm/include/llvm/IR/RuntimeLibcalls.td
b/llvm/include/llvm/IR/RuntimeLibcalls.td
index a6254eafa4906..9b081e9d65449 100644
--- a/llvm/include/llvm/IR/RuntimeLibcalls.td
+++ b/llvm/include/llvm/IR/RuntimeLibcalls.td
@@ -2120,7 +2120,7 @@ defvar X86CommonLibcalls =
);
defvar Windows32DivRemMulCalls =
- LibcallImpls<(add WindowsDivRemMulLibcalls),
+ LibcallsWithCC<(add WindowsDivRemMulLibcalls), X86_STDCALL,
RuntimeLibcallPredicate<"TT.isWindowsMSVCEnvironment() ||
TT.isWindowsItaniumEnvironment()">>;
def X86_32SystemLibrary
diff --git a/llvm/test/CodeGen/X86/win32-int-runtime-libcalls.ll
b/llvm/test/CodeGen/X86/win32-int-runtime-libcalls.ll
new file mode 100644
index 0000000000000..5ac90a0af2e57
--- /dev/null
+++ b/llvm/test/CodeGen/X86/win32-int-runtime-libcalls.ll
@@ -0,0 +1,113 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck -check-prefix=CHECK32 %s
+; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck -check-prefix=CHECK64
%s
+
+define i64 @test_sdiv_i64(i64 %a, i64 %b) {
+; CHECK32-LABEL: test_sdiv_i64:
+; CHECK32: # %bb.0:
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: calll __alldiv
+; CHECK32-NEXT: retl
+;
+; CHECK64-LABEL: test_sdiv_i64:
+; CHECK64: # %bb.0:
+; CHECK64-NEXT: movq %rdx, %r8
+; CHECK64-NEXT: movq %rcx, %rax
+; CHECK64-NEXT: cqto
+; CHECK64-NEXT: idivq %r8
+; CHECK64-NEXT: retq
+ %ret = sdiv i64 %a, %b
+ ret i64 %ret
+}
+
+define i64 @test_srem_i64(i64 %a, i64 %b) {
+; CHECK32-LABEL: test_srem_i64:
+; CHECK32: # %bb.0:
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: calll __allrem
+; CHECK32-NEXT: retl
+;
+; CHECK64-LABEL: test_srem_i64:
+; CHECK64: # %bb.0:
+; CHECK64-NEXT: movq %rdx, %r8
+; CHECK64-NEXT: movq %rcx, %rax
+; CHECK64-NEXT: cqto
+; CHECK64-NEXT: idivq %r8
+; CHECK64-NEXT: movq %rdx, %rax
+; CHECK64-NEXT: retq
+ %ret = srem i64 %a, %b
+ ret i64 %ret
+}
+
+define i64 @test_udiv_i64(i64 %a, i64 %b) {
+; CHECK32-LABEL: test_udiv_i64:
+; CHECK32: # %bb.0:
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: calll __aulldiv
+; CHECK32-NEXT: retl
+;
+; CHECK64-LABEL: test_udiv_i64:
+; CHECK64: # %bb.0:
+; CHECK64-NEXT: movq %rdx, %r8
+; CHECK64-NEXT: movq %rcx, %rax
+; CHECK64-NEXT: xorl %edx, %edx
+; CHECK64-NEXT: divq %r8
+; CHECK64-NEXT: retq
+ %ret = udiv i64 %a, %b
+ ret i64 %ret
+}
+
+define i64 @test_urem_i64(i64 %a, i64 %b) {
+; CHECK32-LABEL: test_urem_i64:
+; CHECK32: # %bb.0:
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: pushl {{[0-9]+}}(%esp)
+; CHECK32-NEXT: calll __aullrem
+; CHECK32-NEXT: retl
+;
+; CHECK64-LABEL: test_urem_i64:
+; CHECK64: # %bb.0:
+; CHECK64-NEXT: movq %rdx, %r8
+; CHECK64-NEXT: movq %rcx, %rax
+; CHECK64-NEXT: xorl %edx, %edx
+; CHECK64-NEXT: divq %r8
+; CHECK64-NEXT: movq %rdx, %rax
+; CHECK64-NEXT: retq
+ %ret = urem i64 %a, %b
+ ret i64 %ret
+}
+
+define i64 @test_mul_i64(i64 %a, i64 %b) {
+; CHECK32-LABEL: test_mul_i64:
+; CHECK32: # %bb.0:
+; CHECK32-NEXT: pushl %esi
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
+; CHECK32-NEXT: movl %ecx, %eax
+; CHECK32-NEXT: mull %esi
+; CHECK32-NEXT: imull {{[0-9]+}}(%esp), %ecx
+; CHECK32-NEXT: addl %ecx, %edx
+; CHECK32-NEXT: imull {{[0-9]+}}(%esp), %esi
+; CHECK32-NEXT: addl %esi, %edx
+; CHECK32-NEXT: popl %esi
+; CHECK32-NEXT: retl
+;
+; CHECK64-LABEL: test_mul_i64:
+; CHECK64: # %bb.0:
+; CHECK64-NEXT: movq %rcx, %rax
+; CHECK64-NEXT: imulq %rdx, %rax
+; CHECK64-NEXT: retq
+ %ret = mul i64 %a, %b
+ ret i64 %ret
+}
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