================
@@ -0,0 +1,253 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mattr=+sve -verify-machineinstrs < %s | FileCheck %s
--check-prefixes=SVE
+; RUN: llc -mattr=+sve2 -verify-machineinstrs < %s | FileCheck %s
--check-prefixes=SVE2
+
+target triple = "aarch64-unknown-linux-gnu"
+
+; Test vector_splice patterns.
+; Note that this test is similar to named-vector-shuffles-sve.ll, but it
focuses
+; on testing all supported types, and a positive "splice index".
+
+
+; i8 elements
+define <vscale x 16 x i8> @splice_nxv16i8(<vscale x 16 x i8> %a, <vscale x 16
x i8> %b) {
+; SVE-LABEL: splice_nxv16i8:
+; SVE: // %bb.0:
+; SVE-NEXT: ext z0.b, z0.b, z1.b, #1
+; SVE-NEXT: ret
+;
+; SVE2-LABEL: splice_nxv16i8:
+; SVE2: // %bb.0:
+; SVE2-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1
+; SVE2-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1
+; SVE2-NEXT: ext z0.b, { z0.b, z1.b }, #1
+; SVE2-NEXT: ret
+ %res = call <vscale x 16 x i8> @llvm.vector.splice.nxv16i8(<vscale x 16 x
i8> %a, <vscale x 16 x i8> %b, i32 1)
+ ret <vscale x 16 x i8> %res
+}
+
+; i16 elements
+define <vscale x 8 x i16> @splice_nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x
i16> %b) {
+; SVE-LABEL: splice_nxv8i16:
+; SVE: // %bb.0:
+; SVE-NEXT: ext z0.b, z0.b, z1.b, #2
+; SVE-NEXT: ret
+;
+; SVE2-LABEL: splice_nxv8i16:
+; SVE2: // %bb.0:
+; SVE2-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1
+; SVE2-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1
+; SVE2-NEXT: ext z0.b, { z0.b, z1.b }, #2
+; SVE2-NEXT: ret
+ %res = call <vscale x 8 x i16> @llvm.vector.splice.nxv8i16(<vscale x 8 x
i16> %a, <vscale x 8 x i16> %b, i32 1)
+ ret <vscale x 8 x i16> %res
+}
+
+; bf16 elements
+
+define <vscale x 8 x bfloat> @splice_nxv8bfloat(<vscale x 8 x bfloat> %a,
<vscale x 8 x bfloat> %b) {
+; SVE-LABEL: splice_nxv8bfloat:
+; SVE: // %bb.0:
+; SVE-NEXT: ext z0.b, z0.b, z1.b, #2
+; SVE-NEXT: ret
+;
+; SVE2-LABEL: splice_nxv8bfloat:
+; SVE2: // %bb.0:
+; SVE2-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1
+; SVE2-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1
+; SVE2-NEXT: ext z0.b, { z0.b, z1.b }, #2
+; SVE2-NEXT: ret
+ %res = call <vscale x 8 x bfloat> @llvm.vector.splice.nxv8bfloat(<vscale x 8
x bfloat> %a, <vscale x 8 x bfloat> %b, i32 1)
+ ret <vscale x 8 x bfloat> %res
+}
+
+define <vscale x 4 x bfloat> @splice_nxv4bfloat(<vscale x 4 x bfloat> %a,
<vscale x 4 x bfloat> %b) {
+; SVE-LABEL: splice_nxv4bfloat:
+; SVE: // %bb.0:
+; SVE-NEXT: ext z0.b, z0.b, z1.b, #4
+; SVE-NEXT: ret
+;
+; SVE2-LABEL: splice_nxv4bfloat:
+; SVE2: // %bb.0:
+; SVE2-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1
+; SVE2-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1
+; SVE2-NEXT: ext z0.b, { z0.b, z1.b }, #4
+; SVE2-NEXT: ret
+ %res = call <vscale x 4 x bfloat> @llvm.vector.splice.nxv4bfloat(<vscale x 4
x bfloat> %a, <vscale x 4 x bfloat> %b, i32 1)
----------------
gbossu wrote:
⚠️ I have included the same type support for `EXT_ZZI_B` as we have for the
destructive `EXT_ZZI`, i.e. support for these "weird" types where the fixed
part isn't 128-bit:
- <vscale x 4 x bfloat>
- <vscale x 2 x bfloat>
- <vscale x 4 x half>
- <vscale x 2 x half>
- <vscale x 2 x float>
I'm not sure why they were here in the first place, and looking at the
generated code, I think the patterns are wrong. Maybe I should just remove
those types altogether?
https://github.com/llvm/llvm-project/pull/151730
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