================ @@ -3006,10 +3024,41 @@ bool IRTranslator::translateInvoke(const User &U, return true; } +/// The intrinsics currently supported by callbr are implicit control flow +/// intrinsics such as amdgcn.kill. bool IRTranslator::translateCallBr(const User &U, MachineIRBuilder &MIRBuilder) { - // FIXME: Implement this. - return false; + if (containsBF16Type(U)) + return false; // see translateCall + + const CallBrInst &I = cast<CallBrInst>(U); + MachineBasicBlock *CallBrMBB = &MIRBuilder.getMBB(); + + // FIXME: inline asm not yet supported for callbr in GlobalISel As soon as we + // add support, we need to handle the indirect asm targets, see + // SelectionDAGBuilder::visitCallBr(). + if (I.isInlineAsm()) + return false; + if (I.getIntrinsicID() == Intrinsic::not_intrinsic) + return false; + if (!translateTargetIntrinsic(I, I.getIntrinsicID(), MIRBuilder)) + return false; + + // Retrieve successors. + SmallPtrSet<BasicBlock *, 8> Dests; + Dests.insert(I.getDefaultDest()); ---------------- ro-i wrote:
It does, thanks! https://github.com/llvm/llvm-project/pull/133907 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits