================
@@ -256,12 +256,13 @@ define <vscale x 2 x double>
@splice_nxv2f64_last_idx(<vscale x 2 x double> %a,
define <vscale x 2 x i1> @splice_nxv2i1_idx(<vscale x 2 x i1> %a, <vscale x 2
x i1> %b) #0 {
; CHECK-LABEL: splice_nxv2i1_idx:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov z0.d, p1/z, #1 // =0x1
; CHECK-NEXT: mov z1.d, p0/z, #1 // =0x1
+; CHECK-NEXT: mov z0.d, p1/z, #1 // =0x1
; CHECK-NEXT: ptrue p0.d
-; CHECK-NEXT: ext z1.b, z1.b, z0.b, #8
-; CHECK-NEXT: and z1.d, z1.d, #0x1
-; CHECK-NEXT: cmpne p0.d, p0/z, z1.d, #0
+; CHECK-NEXT: mov z0.d, z1.d
----------------
gbossu wrote:
This is one case where we get worse due to an extra MOV that could not be
turned into a MOVPRFX. THis is alleviated in the next commit using register
hints.
https://github.com/llvm/llvm-project/pull/152554
_______________________________________________
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
