================
@@ -392,6 +401,102 @@ void
AMDGPURegBankCombinerImpl::applyCanonicalizeZextShiftAmt(
MI.eraseFromParent();
}
+bool AMDGPURegBankCombinerImpl::matchD16Load(MachineInstr &MI,
+ D16MatchInfo &MatchInfo) const {
+ if (!STI.d16PreservesUnusedBits())
----------------
Pierre-vh wrote:
We do have a way, it's the field called `Predicates` in the combine rule.
https://github.com/llvm/llvm-project/pull/153178
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