https://github.com/kasuga-fj created
https://github.com/llvm/llvm-project/pull/157084
None
>From 153b37c028351bd3d371e9a7b88a462040668cfe Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga <kasuga.ryot...@fujitsu.com>
Date: Fri, 5 Sep 2025 10:13:22 +0000
Subject: [PATCH] [DA] Add option to run only SIV routines
---
llvm/lib/Analysis/DependenceAnalysis.cpp | 14 ++
.../Analysis/DependenceAnalysis/ExactSIV.ll | 198 ++++++++++++++++++
2 files changed, 212 insertions(+)
diff --git a/llvm/lib/Analysis/DependenceAnalysis.cpp
b/llvm/lib/Analysis/DependenceAnalysis.cpp
index 43eefc3120f9e..0f77a1410e83b 100644
--- a/llvm/lib/Analysis/DependenceAnalysis.cpp
+++ b/llvm/lib/Analysis/DependenceAnalysis.cpp
@@ -121,6 +121,12 @@ static cl::opt<unsigned> MIVMaxLevelThreshold(
cl::desc("Maximum depth allowed for the recursive algorithm used to "
"explore MIV direction vectors."));
+static cl::opt<bool> RunSIVRoutinesOnly(
+ "da-run-siv-routines-only", cl::init(false), cl::ReallyHidden,
+ cl::desc("Run only SIV routines and disable others (ZIV, RDIV, and MIV). "
+ "The purpose is mainly to exclude the influence of those routines
"
+ "in regression tests for SIV routines."));
+
//===----------------------------------------------------------------------===//
// basics
@@ -1980,6 +1986,8 @@ bool DependenceInfo::exactRDIVtest(const SCEV *SrcCoeff,
const SCEV *DstCoeff,
const SCEV *SrcConst, const SCEV *DstConst,
const Loop *SrcLoop, const Loop *DstLoop,
FullDependence &Result) const {
+ if (RunSIVRoutinesOnly)
+ return false;
LLVM_DEBUG(dbgs() << "\tExact RDIV test\n");
LLVM_DEBUG(dbgs() << "\t SrcCoeff = " << *SrcCoeff << " = AM\n");
LLVM_DEBUG(dbgs() << "\t DstCoeff = " << *DstCoeff << " = BM\n");
@@ -2124,6 +2132,8 @@ bool DependenceInfo::symbolicRDIVtest(const SCEV *A1,
const SCEV *A2,
const SCEV *C1, const SCEV *C2,
const Loop *Loop1,
const Loop *Loop2) const {
+ if (RunSIVRoutinesOnly)
+ return false;
++SymbolicRDIVapplications;
LLVM_DEBUG(dbgs() << "\ttry symbolic RDIV test\n");
LLVM_DEBUG(dbgs() << "\t A1 = " << *A1);
@@ -2433,6 +2443,8 @@ bool DependenceInfo::accumulateCoefficientsGCD(const SCEV
*Expr,
// to "a common divisor".
bool DependenceInfo::gcdMIVtest(const SCEV *Src, const SCEV *Dst,
FullDependence &Result) const {
+ if (RunSIVRoutinesOnly)
+ return false;
LLVM_DEBUG(dbgs() << "starting gcd\n");
++GCDapplications;
unsigned BitWidth = SE->getTypeSizeInBits(Src->getType());
@@ -2599,6 +2611,8 @@ bool DependenceInfo::gcdMIVtest(const SCEV *Src, const
SCEV *Dst,
bool DependenceInfo::banerjeeMIVtest(const SCEV *Src, const SCEV *Dst,
const SmallBitVector &Loops,
FullDependence &Result) const {
+ if (RunSIVRoutinesOnly)
+ return false;
LLVM_DEBUG(dbgs() << "starting Banerjee\n");
++BanerjeeApplications;
LLVM_DEBUG(dbgs() << " Src = " << *Src << '\n');
diff --git a/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
b/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
index b6b44ad4bfc53..0fe62991fede9 100644
--- a/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
+++ b/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
@@ -1,6 +1,8 @@
; NOTE: Assertions have been autogenerated by
utils/update_analyze_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -disable-output "-passes=print<da>" -aa-pipeline=basic-aa 2>&1
\
; RUN: | FileCheck %s
+; RUN: opt < %s -disable-output "-passes=print<da>" -da-run-siv-routines-only
2>&1 \
+; RUN: | FileCheck %s --check-prefix=CHECK-SIV-ONLY
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.6.0"
@@ -25,6 +27,20 @@ define void @exact0(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact0'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - flow [<=|<]!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -69,6 +85,20 @@ define void @exact1(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact1'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx3, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx3, align 4 --> Dst:
%0 = load i32, ptr %arrayidx3, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx3, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -114,6 +144,20 @@ define void @exact2(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact2'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -157,6 +201,20 @@ define void @exact3(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact3'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - flow [>]!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -200,6 +258,20 @@ define void @exact4(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact4'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - flow [>]!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -243,6 +315,20 @@ define void @exact5(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact5'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - flow [=>|<]!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -286,6 +372,20 @@ define void @exact6(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact6'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - flow [=>|<]!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -329,6 +429,20 @@ define void @exact7(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact7'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - flow [*|<]!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
%0 = load i32, ptr %arrayidx1, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx1, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -372,6 +486,20 @@ define void @exact8(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact8'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -415,6 +543,20 @@ define void @exact9(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact9'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - flow [>]!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -458,6 +600,20 @@ define void @exact10(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact10'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - flow [>]!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -501,6 +657,20 @@ define void @exact11(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact11'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - flow [=>|<]!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -544,6 +714,20 @@ define void @exact12(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact12'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - flow [=>|<]!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
@@ -587,6 +771,20 @@ define void @exact13(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: store i32
%0, ptr %B.addr.01, align 4
; CHECK-NEXT: da analyze - none!
;
+; CHECK-SIV-ONLY-LABEL: 'exact13'
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %conv, ptr %arrayidx, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - flow [*|<]!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %conv, ptr %arrayidx, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
%0 = load i32, ptr %arrayidx2, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: %0 = load i32, ptr %arrayidx2, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - confused!
+; CHECK-SIV-ONLY-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst:
store i32 %0, ptr %B.addr.01, align 4
+; CHECK-SIV-ONLY-NEXT: da analyze - none!
+;
entry:
br label %for.body
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