https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/157400
Directly use the triple instead of having an additional field.
>From 27e0075d67fa33345bfb361fecac6ec7636cd442 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <matthew.arsena...@amd.com>
Date: Mon, 8 Sep 2025 16:35:42 +0900
Subject: [PATCH] Sparc: Remove Is64Bit field from SparcTargetMachine
Directly use the triple instead of having an additional field.
---
llvm/lib/Target/Sparc/SparcSubtarget.cpp | 8 +++----
llvm/lib/Target/Sparc/SparcSubtarget.h | 4 ++--
llvm/lib/Target/Sparc/SparcTargetMachine.cpp | 24 ++++++++++----------
llvm/lib/Target/Sparc/SparcTargetMachine.h | 3 +--
4 files changed, 19 insertions(+), 20 deletions(-)
diff --git a/llvm/lib/Target/Sparc/SparcSubtarget.cpp
b/llvm/lib/Target/Sparc/SparcSubtarget.cpp
index 5a71e49467b14..f2721ead00697 100644
--- a/llvm/lib/Target/Sparc/SparcSubtarget.cpp
+++ b/llvm/lib/Target/Sparc/SparcSubtarget.cpp
@@ -31,7 +31,7 @@ SparcSubtarget
&SparcSubtarget::initializeSubtargetDependencies(
// Determine default and user specified characteristics
std::string CPUName = std::string(CPU);
if (CPUName.empty())
- CPUName = (Is64Bit) ? "v9" : "v8";
+ CPUName = getTargetTriple().isSPARC64() ? "v9" : "v8";
if (TuneCPU.empty())
TuneCPU = CPUName;
@@ -47,10 +47,10 @@ SparcSubtarget
&SparcSubtarget::initializeSubtargetDependencies(
}
SparcSubtarget::SparcSubtarget(const StringRef &CPU, const StringRef &TuneCPU,
- const StringRef &FS, const TargetMachine &TM,
- bool is64Bit)
+ const StringRef &FS, const TargetMachine &TM)
: SparcGenSubtargetInfo(TM.getTargetTriple(), CPU, TuneCPU, FS),
- ReserveRegister(TM.getMCRegisterInfo()->getNumRegs()), Is64Bit(is64Bit),
+ ReserveRegister(TM.getMCRegisterInfo()->getNumRegs()),
+ Is64Bit(TM.getTargetTriple().isSPARC64()),
InstrInfo(initializeSubtargetDependencies(CPU, TuneCPU, FS)),
TLInfo(TM, *this), FrameLowering(*this) {
TSInfo = std::make_unique<SparcSelectionDAGInfo>();
diff --git a/llvm/lib/Target/Sparc/SparcSubtarget.h
b/llvm/lib/Target/Sparc/SparcSubtarget.h
index 502be1e06d41c..f98aef012a867 100644
--- a/llvm/lib/Target/Sparc/SparcSubtarget.h
+++ b/llvm/lib/Target/Sparc/SparcSubtarget.h
@@ -36,7 +36,7 @@ class SparcSubtarget : public SparcGenSubtargetInfo {
virtual void anchor();
- bool Is64Bit;
+ const bool Is64Bit;
#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER)
\
bool ATTRIBUTE = DEFAULT;
@@ -49,7 +49,7 @@ class SparcSubtarget : public SparcGenSubtargetInfo {
public:
SparcSubtarget(const StringRef &CPU, const StringRef &TuneCPU,
- const StringRef &FS, const TargetMachine &TM, bool is64bit);
+ const StringRef &FS, const TargetMachine &TM);
~SparcSubtarget() override;
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
index 52076a6b4dd22..754c8f63ca4ec 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -38,7 +38,9 @@ static cl::opt<bool>
BranchRelaxation("sparc-enable-branch-relax", cl::Hidden, cl::init(true),
cl::desc("Relax out of range conditional branches"));
-static std::string computeDataLayout(const Triple &T, bool is64Bit) {
+static std::string computeDataLayout(const Triple &T) {
+ const bool is64Bit = T.isSPARC64();
+
// Sparc is typically big endian, but some are little.
std::string Ret = T.getArch() == Triple::sparcel ? "e" : "E";
Ret += "-m:e";
@@ -107,15 +109,14 @@ SparcTargetMachine::SparcTargetMachine(const Target &T,
const Triple &TT,
const TargetOptions &Options,
std::optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
- CodeGenOptLevel OL, bool JIT,
- bool is64bit)
+ CodeGenOptLevel OL, bool JIT)
: CodeGenTargetMachineImpl(
- T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options,
+ T, computeDataLayout(TT), TT, CPU, FS, Options,
getEffectiveRelocModel(RM),
- getEffectiveSparcCodeModel(CM, getEffectiveRelocModel(RM), is64bit,
- JIT),
+ getEffectiveSparcCodeModel(CM, getEffectiveRelocModel(RM),
+ TT.isSPARC64(), JIT),
OL),
- TLOF(std::make_unique<SparcELFTargetObjectFile>()), is64Bit(is64bit) {
+ TLOF(std::make_unique<SparcELFTargetObjectFile>()) {
initAsmInfo();
}
@@ -148,8 +149,7 @@ SparcTargetMachine::getSubtargetImpl(const Function &F)
const {
// creation will depend on the TM and the code generation flags on the
// function that reside in TargetOptions.
resetTargetOptions(F);
- I = std::make_unique<SparcSubtarget>(CPU, TuneCPU, FS, *this,
- this->is64Bit);
+ I = std::make_unique<SparcSubtarget>(CPU, TuneCPU, FS, *this);
}
return I.get();
}
@@ -212,7 +212,7 @@ SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
const Triple &TT,
std::optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
CodeGenOptLevel OL, bool JIT)
- : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}
+ : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT) {}
void SparcV9TargetMachine::anchor() { }
@@ -222,7 +222,7 @@ SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
const Triple &TT,
std::optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
CodeGenOptLevel OL, bool JIT)
- : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}
+ : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT) {}
void SparcelTargetMachine::anchor() {}
@@ -232,4 +232,4 @@ SparcelTargetMachine::SparcelTargetMachine(const Target &T,
const Triple &TT,
std::optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM,
CodeGenOptLevel OL, bool JIT)
- : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}
+ : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT) {}
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.h
b/llvm/lib/Target/Sparc/SparcTargetMachine.h
index 9a226a47671b3..e7d038c5779d4 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.h
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.h
@@ -23,7 +23,6 @@ namespace llvm {
class SparcTargetMachine : public CodeGenTargetMachineImpl {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
- bool is64Bit;
mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap;
public:
@@ -31,7 +30,7 @@ class SparcTargetMachine : public CodeGenTargetMachineImpl {
StringRef FS, const TargetOptions &Options,
std::optional<Reloc::Model> RM,
std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
- bool JIT, bool is64bit);
+ bool JIT);
~SparcTargetMachine() override;
const SparcSubtarget *getSubtargetImpl(const Function &F) const override;
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