Author: Lei Huang Date: 2025-09-23T11:15:11-04:00 New Revision: 0ebcc9d0bcd53d8f02f358e52d40a7ab25cdaa4e
URL: https://github.com/llvm/llvm-project/commit/0ebcc9d0bcd53d8f02f358e52d40a7ab25cdaa4e DIFF: https://github.com/llvm/llvm-project/commit/0ebcc9d0bcd53d8f02f358e52d40a7ab25cdaa4e.diff LOG: [NFC][PowerPC] Move Anonymous Patterns up for consistency (#160322) Added: Modified: llvm/lib/Target/PowerPC/PPCInstrFuture.td Removed: ################################################################################ diff --git a/llvm/lib/Target/PowerPC/PPCInstrFuture.td b/llvm/lib/Target/PowerPC/PPCInstrFuture.td index a61b347f912f0..46cd8cd0a83b3 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrFuture.td +++ b/llvm/lib/Target/PowerPC/PPCInstrFuture.td @@ -278,6 +278,21 @@ let Predicates = [HasVSX, IsISAFuture] in { //---------------------------- Anonymous Patterns ----------------------------// // Predicate combinations available: +// Load/Store VSX Vector with Right Length (Left-justified). +def : Pat<(v4i32 (int_ppc_vsx_lxvrl addr:$RA, i64:$RB)), (LXVRL $RA, $RB)>; +def : Pat<(v4i32 (int_ppc_vsx_lxvrll addr:$RA, i64:$RB)), (LXVRLL $RA, $RB)>; +def : Pat<(int_ppc_vsx_stxvrl v4i32:$XT, addr:$RA, i64:$RB), (STXVRL $XT, $RA, + $RB)>; +def : Pat<(int_ppc_vsx_stxvrll v4i32:$XT, addr:$RA, i64:$RB), (STXVRLL $XT, $RA, + $RB)>; + +// Load/Store VSX Vector pair with Right Length (Left-justified). +def : Pat<(v256i1 (int_ppc_vsx_lxvprl addr:$RA, i64:$RB)), (LXVPRL $RA, $RB)>; +def : Pat<(v256i1 (int_ppc_vsx_lxvprll addr:$RA, i64:$RB)), (LXVPRLL $RA, $RB)>; +def : Pat<(int_ppc_vsx_stxvprl v256i1:$XTp, addr:$RA, i64:$RB), (STXVPRL $XTp, + $RA, $RB)>; +def : Pat<(int_ppc_vsx_stxvprll v256i1:$XTp, addr:$RA, i64:$RB), (STXVPRLL $XTp, + $RA, $RB)>; //---------------------------- Instruction aliases ---------------------------// // Predicate combinations available: @@ -307,21 +322,3 @@ let Predicates = [HasVSX, IsISAFuture] in { def : InstAlias<"xxgfmul128xts $XT, $XA, $XB", (XXGFMUL128 vsrc:$XT, vsrc:$XA, vsrc:$XB, 1)>; } - -//---------------------------- Anonymous Patterns ----------------------------// - -// Load/Store VSX Vector with Right Length (Left-justified). -def : Pat<(v4i32 (int_ppc_vsx_lxvrl addr:$RA, i64:$RB)), (LXVRL $RA, $RB)>; -def : Pat<(v4i32 (int_ppc_vsx_lxvrll addr:$RA, i64:$RB)), (LXVRLL $RA, $RB)>; -def : Pat<(int_ppc_vsx_stxvrl v4i32:$XT, addr:$RA, i64:$RB), (STXVRL $XT, $RA, - $RB)>; -def : Pat<(int_ppc_vsx_stxvrll v4i32:$XT, addr:$RA, i64:$RB), (STXVRLL $XT, $RA, - $RB)>; - -// Load/Store VSX Vector pair with Right Length (Left-justified). -def : Pat<(v256i1 (int_ppc_vsx_lxvprl addr:$RA, i64:$RB)), (LXVPRL $RA, $RB)>; -def : Pat<(v256i1 (int_ppc_vsx_lxvprll addr:$RA, i64:$RB)), (LXVPRLL $RA, $RB)>; -def : Pat<(int_ppc_vsx_stxvprl v256i1:$XTp, addr:$RA, i64:$RB), (STXVPRL $XTp, - $RA, $RB)>; -def : Pat<(int_ppc_vsx_stxvprll v256i1:$XTp, addr:$RA, i64:$RB), (STXVPRLL $XTp, - $RA, $RB)>; _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
