[llvm-branch-commits] [clang] [llvm] [AArch64][llvm] Armv9.7-A: Add support for new Advanced SIMD (Neon) instructions (PR #163165)

[Jonathan Thackray via llvm-branch-commits]

================
@@ -6538,8 +6538,7 @@ multiclass SIMDThreeSameVectorFML<bit U, bit b13, bits<3> 
size, string asm,
 }
 
 multiclass SIMDThreeSameVectorMLA<bit Q, string asm, SDPatternOperator op> {
-
-  def v8f16 : BaseSIMDThreeSameVectorDot<Q, 0b0, 0b11, 0b1111, asm, ".8h", 
".16b",
+  def v16f8 : BaseSIMDThreeSameVectorDot<Q, 0b0, 0b11, 0b1111, asm, ".8h", 
".16b",
----------------
jthackray wrote:

I've changed this to `v8f16_v16i8`. Need to investigate the `i8` parameter here.

https://github.com/llvm/llvm-project/pull/163165
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