================ @@ -1220,6 +1220,11 @@ def : Pat<(v2i64 (scalar_to_vector (i64 (atomic_load_64 addr:$src)))), def : Pat<(v2i64 (scalar_to_vector (i64 (atomic_load_64 addr:$src)))), (VMOV64toPQIZrm addr:$src)>, Requires<[HasAVX512]>; +def : Pat<(v2i64 (atomic_load_128_v2i64 addr:$src)), + (VMOVAPDrm addr:$src)>; // load atomic <2 x i64> +def : Pat<(v4i32 (atomic_load_128_v4i32 addr:$src)), + (VMOVAPDrm addr:$src)>; // load atomic <4 x i32> ---------------- RKSimon wrote:
These need to be tagged with Requires<[UseAVX] and the SSE2/AVX512 variants adding as well (MOVAPDrm / VMOVAPDZ128rm) https://github.com/llvm/llvm-project/pull/148900 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
