================
@@ -4088,7 +4107,20 @@ MachineInstr
*SIInstrInfo::convertToThreeAddress(MachineInstr &MI,
LV->getVarInfo(DefReg).AliveBlocks.clear();
}
- if (LIS) {
+ if (MI.isBundle()) {
+ VirtRegInfo VRI = AnalyzeVirtRegInBundle(MI, DefReg);
+ if (!VRI.Reads && !VRI.Writes) {
+ for (MachineOperand &MO : MI.all_uses()) {
+ if (MO.isReg() && MO.getReg() == DefReg) {
----------------
nhaehnle wrote:
See the discussion with Jay in #166212 -- I looked into it and decided to just
prevent and forbid tied sub-registers on bundles in pre-RA as the safer route
due to the complexities involved.
I'm adding an assert to that effect here.
https://github.com/llvm/llvm-project/pull/166213
_______________________________________________
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
