llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-llvm-selectiondag Author: Matt Arsenault (arsenm) <details> <summary>Changes</summary> It's possible to determine the sign bit if the value is known one of the positive/negative classes and not-nan. --- Full diff: https://github.com/llvm/llvm-project/pull/167289.diff 2 Files Affected: - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (+21) - (modified) llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll (-2) ``````````diff diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 80bbfea7fb83c..27dcd8a546d91 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -4121,6 +4121,27 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts, Known.One.clearLowBits(LogOfAlign); break; } + case ISD::AssertNoFPClass: { + Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1); + + FPClassTest NoFPClass = + static_cast<FPClassTest>(Op.getConstantOperandVal(1)); + const FPClassTest NegativeTestMask = fcNan | fcNegative; + if ((NoFPClass & NegativeTestMask) == NegativeTestMask) { + // Cannot be negative. + Known.Zero.setSignBit(); + Known.One.clearSignBit(); + } + + const FPClassTest PositiveTestMask = fcNan | fcPositive; + if ((NoFPClass & PositiveTestMask) == PositiveTestMask) { + // Cannot be positive. + Known.Zero.clearSignBit(); + Known.One.setSignBit(); + } + + break; + } case ISD::FGETSIGN: // All bits are zero except the low bit. Known.Zero.setBitsFrom(1); diff --git a/llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll b/llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll index d440d58246333..244c3f7c2a96a 100644 --- a/llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll +++ b/llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll @@ -5,7 +5,6 @@ define i32 @known_positive(float nofpclass(nan ninf nzero nsub nnorm) %signbit.z ; CHECK-LABEL: known_positive: ; CHECK: ; %bb.0: ; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; CHECK-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0 ; CHECK-NEXT: s_setpc_b64 s[30:31] %cast = bitcast float %signbit.zero to i32 %and = and i32 %cast, 2147483647 @@ -27,7 +26,6 @@ define i32 @known_negative(float nofpclass(nan pinf pzero psub pnorm) %signbit.o ; CHECK-LABEL: known_negative: ; CHECK: ; %bb.0: ; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; CHECK-NEXT: v_or_b32_e32 v0, 0x80000000, v0 ; CHECK-NEXT: s_setpc_b64 s[30:31] %cast = bitcast float %signbit.one to i32 %or = or i32 %cast, -2147483648 `````````` </details> https://github.com/llvm/llvm-project/pull/167289 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
