================ @@ -2244,17 +2244,49 @@ bool SIFrameLowering::allocateScavengingFrameIndexesNearIncomingSP( return true; } +static bool isLiveIntoMBB(MCRegister Reg, MachineBasicBlock &MBB, ---------------- slinder1 wrote:
> For cases like a livein list including $vgpr0_vgpr1, I'm not sure if it is > supposed to also include $vgpr0 and $vgpr1 as separate entries. Thinking on this point in particular, I don't know of a more efficient way to "expand" the livein list to include all such aliases. It seems like we either pay for it up-front and expand the livein list, or we pay for it at the point we look at the CSRs. If we expect the livein list to generally be smaller (and potentially have useful LaneBitmasks we can filter units by, even in prolog?) then we could generate a bitvector of all the physical registers which liveins implies should not be killed if they are spilled. I'll try that, but I'm unsure if the result will actually be cheaper. In particular it seems like we have a cache for `MCRegAliasIterator` and this would bypass that. The only benefit would be that we could consider the LaneMask on the liveins themselves, and I'm not sure how useful that is in thinning out the set of aliases. https://github.com/llvm/llvm-project/pull/164724 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
