https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/173247
>From ab51313268beeed4c4a5cf3cd4464d3dbbfd3113 Mon Sep 17 00:00:00 2001 From: Matt Arsenault <[email protected]> Date: Sun, 21 Dec 2025 19:58:34 +0100 Subject: [PATCH] ValueTracking: Improve computeKnownFPClass fmul handling Improve known non-nan sign bit tracking. Handle cases with a known 0 or inf input of indeterminate sign. The tails of some library functions have sign management for special cases. --- llvm/lib/Analysis/ValueTracking.cpp | 45 ++++++++---- llvm/test/CodeGen/AMDGPU/fold-fabs.ll | 1 - .../Transforms/Attributor/nofpclass-fmul.ll | 70 +++++++++---------- .../Attributor/nofpclass-nan-fmul.ll | 2 +- llvm/test/Transforms/InstCombine/fpcast.ll | 4 +- .../LoopVectorize/scalable-inductions.ll | 3 +- 6 files changed, 71 insertions(+), 54 deletions(-) diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp index 0321c08f55776..c4ad71f668506 100644 --- a/llvm/lib/Analysis/ValueTracking.cpp +++ b/llvm/lib/Analysis/ValueTracking.cpp @@ -5722,14 +5722,8 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts, if (Op->getOperand(0) == Op->getOperand(1)) Known.knownNot(fcNegative); - if ((InterestedClasses & fcNan) != fcNan) - break; - - // fcSubnormal is only needed in case of DAZ. - const FPClassTest NeedForNan = fcNan | fcInf | fcZero | fcSubnormal; - KnownFPClass KnownLHS, KnownRHS; - computeKnownFPClass(Op->getOperand(1), DemandedElts, NeedForNan, KnownRHS, + computeKnownFPClass(Op->getOperand(1), DemandedElts, fcAllFlags, KnownRHS, Q, Depth + 1); const APFloat *CRHS; @@ -5749,12 +5743,39 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts, Known.knownNot(fcSubnormal); } - if (!KnownRHS.isKnownNeverNaN()) - break; - - computeKnownFPClass(Op->getOperand(0), DemandedElts, NeedForNan, KnownLHS, + computeKnownFPClass(Op->getOperand(0), DemandedElts, fcAllFlags, KnownLHS, Q, Depth + 1); - if (!KnownLHS.isKnownNeverNaN()) + + // xor sign bit. + if ((KnownLHS.isKnownNever(fcNegative) && + KnownRHS.isKnownNever(fcNegative)) || + (KnownLHS.isKnownNever(fcPositive) && + KnownRHS.isKnownNever(fcPositive))) + Known.knownNot(fcNegative); + + if ((KnownLHS.isKnownAlways(fcNegative | fcNan) && + KnownRHS.isKnownNever(fcNegative)) || + (KnownLHS.isKnownNever(fcNegative) && + KnownRHS.isKnownAlways(fcNegative | fcNan))) + Known.knownNot(fcPositive); + + // inf * anything => inf or nan + if (KnownLHS.isKnownAlways(fcInf) || KnownRHS.isKnownAlways(fcInf)) + Known.knownNot(fcNormal | fcSubnormal | fcZero); + + // 0 * anything => 0 or nan + if (KnownRHS.isKnownAlways(fcZero | fcNan) || + KnownLHS.isKnownAlways(fcZero | fcNan)) + Known.knownNot(fcNormal | fcSubnormal | fcInf); + + // +/-0 * +/-inf = nan + if ((KnownLHS.isKnownAlways(fcZero | fcNan) && + KnownRHS.isKnownAlways(fcInf | fcNan)) || + (KnownLHS.isKnownAlways(fcInf | fcNan) && + KnownRHS.isKnownAlways(fcZero | fcNan))) + Known.knownNot(~fcNan); + + if (!KnownLHS.isKnownNeverNaN() || !KnownRHS.isKnownNeverNaN()) break; if (KnownLHS.SignBit && KnownRHS.SignBit) { diff --git a/llvm/test/CodeGen/AMDGPU/fold-fabs.ll b/llvm/test/CodeGen/AMDGPU/fold-fabs.ll index 6ef89a4ccd485..bb1f01b641aee 100644 --- a/llvm/test/CodeGen/AMDGPU/fold-fabs.ll +++ b/llvm/test/CodeGen/AMDGPU/fold-fabs.ll @@ -166,7 +166,6 @@ define float @fold_abs_in_branch_phi(float %arg1, float %arg2) { ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: v_mul_f32_e32 v0, 0x40400000, v0 ; GFX10-NEXT: v_cmp_lt_f32_e32 vcc_lo, -1.0, v0 -; GFX10-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0 ; GFX10-NEXT: s_cbranch_vccnz .LBB5_2 ; GFX10-NEXT: .LBB5_3: ; %Flow1 ; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4 diff --git a/llvm/test/Transforms/Attributor/nofpclass-fmul.ll b/llvm/test/Transforms/Attributor/nofpclass-fmul.ll index 6367fc933b4b5..306a14a708566 100644 --- a/llvm/test/Transforms/Attributor/nofpclass-fmul.ll +++ b/llvm/test/Transforms/Attributor/nofpclass-fmul.ll @@ -257,7 +257,7 @@ define <2 x float> @ret_mul_partially_foldable_exponent_v2f32(<2 x float> %arg0) } define float @ret_mul_f32_0(float %arg0) { -; CHECK-LABEL: define float @ret_mul_f32_0( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_mul_f32_0( ; CHECK-SAME: float [[ARG0:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[CALL:%.*]] = fmul float [[ARG0]], 0.000000e+00 ; CHECK-NEXT: ret float [[CALL]] @@ -267,7 +267,7 @@ define float @ret_mul_f32_0(float %arg0) { } define float @ret_mul_f32_inf(float %arg0) { -; CHECK-LABEL: define nofpclass(sub) float @ret_mul_f32_inf( +; CHECK-LABEL: define nofpclass(zero sub norm) float @ret_mul_f32_inf( ; CHECK-SAME: float [[ARG0:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[CALL:%.*]] = fmul float [[ARG0]], 0x7FF0000000000000 ; CHECK-NEXT: ret float [[CALL]] @@ -277,7 +277,7 @@ define float @ret_mul_f32_inf(float %arg0) { } define float @ret_mul_f32_nan(float %arg0) { -; CHECK-LABEL: define float @ret_mul_f32_nan( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_mul_f32_nan( ; CHECK-SAME: float [[ARG0:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[CALL:%.*]] = fmul float [[ARG0]], 0x7FF8000000000000 ; CHECK-NEXT: ret float [[CALL]] @@ -287,7 +287,7 @@ define float @ret_mul_f32_nan(float %arg0) { } define float @ret_fmul_f32_known_zero_or_nan_lhs(float nofpclass(inf norm sub) %arg0, float %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_zero_or_nan_lhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_zero_or_nan_lhs( ; CHECK-SAME: float nofpclass(inf sub norm) [[ARG0:%.*]], float [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -297,7 +297,7 @@ define float @ret_fmul_f32_known_zero_or_nan_lhs(float nofpclass(inf norm sub) % } define float @ret_fmul_f32_known_zero_or_nan_rhs(float %arg0, float nofpclass(inf norm sub) %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_zero_or_nan_rhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_zero_or_nan_rhs( ; CHECK-SAME: float [[ARG0:%.*]], float nofpclass(inf sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -307,7 +307,7 @@ define float @ret_fmul_f32_known_zero_or_nan_rhs(float %arg0, float nofpclass(in } define float @ret_fmul_f32_known_zero_lhs(float nofpclass(nan inf norm sub) %arg0, float %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_zero_lhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_zero_lhs( ; CHECK-SAME: float nofpclass(nan inf sub norm) [[ARG0:%.*]], float [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -317,7 +317,7 @@ define float @ret_fmul_f32_known_zero_lhs(float nofpclass(nan inf norm sub) %arg } define float @ret_fmul_f32_known_zero_rhs(float %arg0, float nofpclass(nan inf norm sub) %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_zero_rhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_zero_rhs( ; CHECK-SAME: float [[ARG0:%.*]], float nofpclass(nan inf sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -327,7 +327,7 @@ define float @ret_fmul_f32_known_zero_rhs(float %arg0, float nofpclass(nan inf n } define float @ret_fmul_f32_known_pzero_or_nan_lhs(float nofpclass(inf norm sub nzero) %arg0, float %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_pzero_or_nan_lhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_pzero_or_nan_lhs( ; CHECK-SAME: float nofpclass(inf nzero sub norm) [[ARG0:%.*]], float [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -337,7 +337,7 @@ define float @ret_fmul_f32_known_pzero_or_nan_lhs(float nofpclass(inf norm sub n } define float @ret_fmul_f32_known_pzero_or_nan_rhs(float %arg0, float nofpclass(inf norm sub nzero) %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_pzero_or_nan_rhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_pzero_or_nan_rhs( ; CHECK-SAME: float [[ARG0:%.*]], float nofpclass(inf nzero sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -347,7 +347,7 @@ define float @ret_fmul_f32_known_pzero_or_nan_rhs(float %arg0, float nofpclass(i } define float @ret_fmul_f32_known_pzero_lhs(float nofpclass(nan inf norm sub nzero) %arg0, float %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_pzero_lhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_pzero_lhs( ; CHECK-SAME: float nofpclass(nan inf nzero sub norm) [[ARG0:%.*]], float [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -357,7 +357,7 @@ define float @ret_fmul_f32_known_pzero_lhs(float nofpclass(nan inf norm sub nzer } define float @ret_fmul_f32_known_pzero_rhs(float %arg0, float nofpclass(nan inf norm sub nzero) %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_pzero_rhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_pzero_rhs( ; CHECK-SAME: float [[ARG0:%.*]], float nofpclass(nan inf nzero sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -367,7 +367,7 @@ define float @ret_fmul_f32_known_pzero_rhs(float %arg0, float nofpclass(nan inf } define float @ret_fmul_f32_known_nzero_or_nan_lhs(float nofpclass(inf norm sub pzero) %arg0, float %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_nzero_or_nan_lhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_nzero_or_nan_lhs( ; CHECK-SAME: float nofpclass(inf pzero sub norm) [[ARG0:%.*]], float [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -377,7 +377,7 @@ define float @ret_fmul_f32_known_nzero_or_nan_lhs(float nofpclass(inf norm sub p } define float @ret_fmul_f32_known_nzero_or_nan_rhs(float %arg0, float nofpclass(inf norm sub pzero) %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_nzero_or_nan_rhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_nzero_or_nan_rhs( ; CHECK-SAME: float [[ARG0:%.*]], float nofpclass(inf pzero sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -387,7 +387,7 @@ define float @ret_fmul_f32_known_nzero_or_nan_rhs(float %arg0, float nofpclass(i } define float @ret_fmul_f32_known_nzero_lhs(float nofpclass(nan inf norm sub pzero) %arg0, float %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_nzero_lhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_nzero_lhs( ; CHECK-SAME: float nofpclass(nan inf pzero sub norm) [[ARG0:%.*]], float [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -397,7 +397,7 @@ define float @ret_fmul_f32_known_nzero_lhs(float nofpclass(nan inf norm sub pzer } define float @ret_fmul_f32_known_nzero_rhs(float %arg0, float nofpclass(nan inf norm sub pzero) %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_nzero_rhs( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_fmul_f32_known_nzero_rhs( ; CHECK-SAME: float [[ARG0:%.*]], float nofpclass(nan inf pzero sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -427,7 +427,7 @@ define float @ret_fmul_f32_known_inf_or_nan_rhs(float %arg0, float nofpclass(zer } define float @ret_fmul_f32_known_inf_lhs(float nofpclass(nan zero norm sub) %arg0, float %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_inf_lhs( +; CHECK-LABEL: define nofpclass(zero sub norm) float @ret_fmul_f32_known_inf_lhs( ; CHECK-SAME: float nofpclass(nan zero sub norm) [[ARG0:%.*]], float [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -437,7 +437,7 @@ define float @ret_fmul_f32_known_inf_lhs(float nofpclass(nan zero norm sub) %arg } define float @ret_fmul_f32_known_inf_rhs(float %arg0, float nofpclass(nan zero norm sub) %arg1) { -; CHECK-LABEL: define float @ret_fmul_f32_known_inf_rhs( +; CHECK-LABEL: define nofpclass(zero sub norm) float @ret_fmul_f32_known_inf_rhs( ; CHECK-SAME: float [[ARG0:%.*]], float nofpclass(nan zero sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -488,7 +488,7 @@ define float @ret_fmul_f32_known_ninf_or_nan_rhs(float %arg0, float nofpclass(pi ; -> nan define float @ret_known_inf_mul_known_zero(float nofpclass(nan norm sub zero) %arg0, float nofpclass(nan inf norm sub) %arg1) { -; CHECK-LABEL: define float @ret_known_inf_mul_known_zero( +; CHECK-LABEL: define nofpclass(inf zero sub norm) float @ret_known_inf_mul_known_zero( ; CHECK-SAME: float nofpclass(nan zero sub norm) [[ARG0:%.*]], float nofpclass(nan inf sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -499,7 +499,7 @@ define float @ret_known_inf_mul_known_zero(float nofpclass(nan norm sub zero) %a ; -> nan define float @ret_known_inf_or_nan_mul_known_zero(float nofpclass(norm sub zero) %arg0, float nofpclass(nan inf norm sub) %arg1) { -; CHECK-LABEL: define float @ret_known_inf_or_nan_mul_known_zero( +; CHECK-LABEL: define nofpclass(inf zero sub norm) float @ret_known_inf_or_nan_mul_known_zero( ; CHECK-SAME: float nofpclass(zero sub norm) [[ARG0:%.*]], float nofpclass(nan inf sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -510,7 +510,7 @@ define float @ret_known_inf_or_nan_mul_known_zero(float nofpclass(norm sub zero) ; -> nan define float @ret_known_inf_mul_known_zero_or_nan(float nofpclass(nan norm sub zero) %arg0, float nofpclass(inf norm sub) %arg1) { -; CHECK-LABEL: define float @ret_known_inf_mul_known_zero_or_nan( +; CHECK-LABEL: define nofpclass(inf zero sub norm) float @ret_known_inf_mul_known_zero_or_nan( ; CHECK-SAME: float nofpclass(nan zero sub norm) [[ARG0:%.*]], float nofpclass(inf sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -521,7 +521,7 @@ define float @ret_known_inf_mul_known_zero_or_nan(float nofpclass(nan norm sub z ; -> nan define float @ret_known_ninf_mul_known_zero(float nofpclass(nan pinf norm sub zero) %arg0, float nofpclass(nan inf norm sub) %arg1) { -; CHECK-LABEL: define float @ret_known_ninf_mul_known_zero( +; CHECK-LABEL: define nofpclass(inf zero sub norm) float @ret_known_ninf_mul_known_zero( ; CHECK-SAME: float nofpclass(nan pinf zero sub norm) [[ARG0:%.*]], float nofpclass(nan inf sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -532,7 +532,7 @@ define float @ret_known_ninf_mul_known_zero(float nofpclass(nan pinf norm sub ze ; -> nan define float @ret_known_pinf_mul_known_zero(float nofpclass(nan ninf norm sub zero) %arg0, float nofpclass(nan inf norm sub) %arg1) { -; CHECK-LABEL: define float @ret_known_pinf_mul_known_zero( +; CHECK-LABEL: define nofpclass(inf zero sub norm) float @ret_known_pinf_mul_known_zero( ; CHECK-SAME: float nofpclass(nan ninf zero sub norm) [[ARG0:%.*]], float nofpclass(nan inf sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -543,7 +543,7 @@ define float @ret_known_pinf_mul_known_zero(float nofpclass(nan ninf norm sub ze ; -> nan define float @ret_known_zero_mul_known_inf(float nofpclass(nan inf norm sub) %arg0, float nofpclass(nan norm sub zero) %arg1) { -; CHECK-LABEL: define float @ret_known_zero_mul_known_inf( +; CHECK-LABEL: define nofpclass(inf zero sub norm) float @ret_known_zero_mul_known_inf( ; CHECK-SAME: float nofpclass(nan inf sub norm) [[ARG0:%.*]], float nofpclass(nan zero sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -554,7 +554,7 @@ define float @ret_known_zero_mul_known_inf(float nofpclass(nan inf norm sub) %ar ; -> nan define float @ret_known_zero_mul_known_inf_or_nan(float nofpclass(nan inf norm sub) %arg0, float nofpclass(norm sub zero) %arg1) { -; CHECK-LABEL: define float @ret_known_zero_mul_known_inf_or_nan( +; CHECK-LABEL: define nofpclass(inf zero sub norm) float @ret_known_zero_mul_known_inf_or_nan( ; CHECK-SAME: float nofpclass(nan inf sub norm) [[ARG0:%.*]], float nofpclass(zero sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -565,7 +565,7 @@ define float @ret_known_zero_mul_known_inf_or_nan(float nofpclass(nan inf norm s ; -> nan define float @ret_known_zero_or_nan_mul_known_inf(float nofpclass(inf norm sub) %arg0, float nofpclass(nan norm sub zero) %arg1) { -; CHECK-LABEL: define float @ret_known_zero_or_nan_mul_known_inf( +; CHECK-LABEL: define nofpclass(inf zero sub norm) float @ret_known_zero_or_nan_mul_known_inf( ; CHECK-SAME: float nofpclass(inf sub norm) [[ARG0:%.*]], float nofpclass(nan zero sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -602,7 +602,7 @@ define float @ret_fmul_rhs_known_positive_or_nan(float %lhs, float %rhs) { ; Result must be positive or nan define float @ret_fmul_both_signs_positive_or_nan(float %lhs, float %rhs) { -; CHECK-LABEL: define float @ret_fmul_both_signs_positive_or_nan( +; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @ret_fmul_both_signs_positive_or_nan( ; CHECK-SAME: float [[LHS:%.*]], float [[RHS:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[LHS_FABS:%.*]] = call float @llvm.fabs.f32(float [[LHS]]) #[[ATTR2]] ; CHECK-NEXT: [[RHS_FABS:%.*]] = call float @llvm.fabs.f32(float [[RHS]]) #[[ATTR2]] @@ -617,7 +617,7 @@ define float @ret_fmul_both_signs_positive_or_nan(float %lhs, float %rhs) { ; Result must be positive or nan define float @ret_fmul_both_signs_negative_or_nan(float %lhs, float %rhs) { -; CHECK-LABEL: define float @ret_fmul_both_signs_negative_or_nan( +; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @ret_fmul_both_signs_negative_or_nan( ; CHECK-SAME: float [[LHS:%.*]], float [[RHS:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[LHS_FABS:%.*]] = call float @llvm.fabs.f32(float [[LHS]]) #[[ATTR2]] ; CHECK-NEXT: [[RHS_FABS:%.*]] = call float @llvm.fabs.f32(float [[RHS]]) #[[ATTR2]] @@ -636,7 +636,7 @@ define float @ret_fmul_both_signs_negative_or_nan(float %lhs, float %rhs) { ; Result must be negative or nan define float @ret_fmul_lhs_negative_rhs_positive(float %lhs, float %rhs) { -; CHECK-LABEL: define float @ret_fmul_lhs_negative_rhs_positive( +; CHECK-LABEL: define nofpclass(pinf pzero psub pnorm) float @ret_fmul_lhs_negative_rhs_positive( ; CHECK-SAME: float [[LHS:%.*]], float [[RHS:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[LHS_FABS:%.*]] = call float @llvm.fabs.f32(float [[LHS]]) #[[ATTR2]] ; CHECK-NEXT: [[RHS_FABS:%.*]] = call float @llvm.fabs.f32(float [[RHS]]) #[[ATTR2]] @@ -653,7 +653,7 @@ define float @ret_fmul_lhs_negative_rhs_positive(float %lhs, float %rhs) { ; Result must be negative or nan define float @ret_fmul_rhs_negative_lhs_positive(float %lhs, float %rhs) { -; CHECK-LABEL: define float @ret_fmul_rhs_negative_lhs_positive( +; CHECK-LABEL: define nofpclass(pinf pzero psub pnorm) float @ret_fmul_rhs_negative_lhs_positive( ; CHECK-SAME: float [[LHS:%.*]], float [[RHS:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[LHS_FABS:%.*]] = call float @llvm.fabs.f32(float [[LHS]]) #[[ATTR2]] ; CHECK-NEXT: [[RHS_FABS:%.*]] = call float @llvm.fabs.f32(float [[RHS]]) #[[ATTR2]] @@ -670,7 +670,7 @@ define float @ret_fmul_rhs_negative_lhs_positive(float %lhs, float %rhs) { ; Could be inf of either sign define float @ret_known_inf_fmul_known_inf(float nofpclass(norm sub zero nan) %arg0, float nofpclass(norm sub zero nan) %arg1) { -; CHECK-LABEL: define nofpclass(nan) float @ret_known_inf_fmul_known_inf( +; CHECK-LABEL: define nofpclass(nan zero sub norm) float @ret_known_inf_fmul_known_inf( ; CHECK-SAME: float nofpclass(nan zero sub norm) [[ARG0:%.*]], float nofpclass(nan zero sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -681,7 +681,7 @@ define float @ret_known_inf_fmul_known_inf(float nofpclass(norm sub zero nan) %a ; Could be inf of either sign, or nan define float @ret_known_inf_fmul_known_inf_or_nan(float nofpclass(norm sub zero nan) %arg0, float nofpclass(norm sub zero) %arg1) { -; CHECK-LABEL: define float @ret_known_inf_fmul_known_inf_or_nan( +; CHECK-LABEL: define nofpclass(zero sub norm) float @ret_known_inf_fmul_known_inf_or_nan( ; CHECK-SAME: float nofpclass(nan zero sub norm) [[ARG0:%.*]], float nofpclass(zero sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -692,7 +692,7 @@ define float @ret_known_inf_fmul_known_inf_or_nan(float nofpclass(norm sub zero ; Could be inf of either sign, or nan define float @ret_known_inf_or_nan_fmul_known_inf(float nofpclass(norm sub zero) %arg0, float nofpclass(norm sub zero nan) %arg1) { -; CHECK-LABEL: define float @ret_known_inf_or_nan_fmul_known_inf( +; CHECK-LABEL: define nofpclass(zero sub norm) float @ret_known_inf_or_nan_fmul_known_inf( ; CHECK-SAME: float nofpclass(zero sub norm) [[ARG0:%.*]], float nofpclass(nan zero sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -703,7 +703,7 @@ define float @ret_known_inf_or_nan_fmul_known_inf(float nofpclass(norm sub zero) ; Could be zero of either sign define float @ret_known_zero_fmul_known_zero(float nofpclass(inf norm sub nan) %arg0, float nofpclass(inf norm sub nan) %arg1) { -; CHECK-LABEL: define nofpclass(nan) float @ret_known_zero_fmul_known_zero( +; CHECK-LABEL: define nofpclass(nan inf sub norm) float @ret_known_zero_fmul_known_zero( ; CHECK-SAME: float nofpclass(nan inf sub norm) [[ARG0:%.*]], float nofpclass(nan inf sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -714,7 +714,7 @@ define float @ret_known_zero_fmul_known_zero(float nofpclass(inf norm sub nan) % ; Could be zero of either sign, or nan define float @ret_known_zero_fmul_known_zero_or_nan(float nofpclass(inf norm sub nan) %arg0, float nofpclass(inf norm sub) %arg1) { -; CHECK-LABEL: define float @ret_known_zero_fmul_known_zero_or_nan( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_known_zero_fmul_known_zero_or_nan( ; CHECK-SAME: float nofpclass(nan inf sub norm) [[ARG0:%.*]], float nofpclass(inf sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] @@ -725,7 +725,7 @@ define float @ret_known_zero_fmul_known_zero_or_nan(float nofpclass(inf norm sub ; Could be zero of either sign, or nan define float @ret_known_zero_or_nan_fmul_known_zero(float nofpclass(inf norm sub) %arg0, float nofpclass(inf norm sub nan) %arg1) { -; CHECK-LABEL: define float @ret_known_zero_or_nan_fmul_known_zero( +; CHECK-LABEL: define nofpclass(inf sub norm) float @ret_known_zero_or_nan_fmul_known_zero( ; CHECK-SAME: float nofpclass(inf sub norm) [[ARG0:%.*]], float nofpclass(nan inf sub norm) [[ARG1:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[FMUL]] diff --git a/llvm/test/Transforms/Attributor/nofpclass-nan-fmul.ll b/llvm/test/Transforms/Attributor/nofpclass-nan-fmul.ll index f6bb1354cb74f..28a76deda7c31 100644 --- a/llvm/test/Transforms/Attributor/nofpclass-nan-fmul.ll +++ b/llvm/test/Transforms/Attributor/nofpclass-nan-fmul.ll @@ -195,7 +195,7 @@ define float @ret_fmul_square_nnan_nzero(float nofpclass(nan zero) %arg) #0 { } define float @ret_fmul_ieee_inf(float %arg) { -; CHECK-LABEL: define nofpclass(sub) float @ret_fmul_ieee_inf +; CHECK-LABEL: define nofpclass(zero sub norm) float @ret_fmul_ieee_inf ; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR4:[0-9]+]] { ; CHECK-NEXT: [[FMUL:%.*]] = fmul float [[ARG]], 0x7FF0000000000000 ; CHECK-NEXT: ret float [[FMUL]] diff --git a/llvm/test/Transforms/InstCombine/fpcast.ll b/llvm/test/Transforms/InstCombine/fpcast.ll index 1a3faceebf244..887f51659382f 100644 --- a/llvm/test/Transforms/InstCombine/fpcast.ll +++ b/llvm/test/Transforms/InstCombine/fpcast.ll @@ -523,9 +523,7 @@ define <2 x i32> @fptosi_nonnorm_copysign_vec(<2 x float> %x) { define i32 @fptosi_nonnorm_fmul(float %x) { ; CHECK-LABEL: @fptosi_nonnorm_fmul( -; CHECK-NEXT: [[SEL:%.*]] = fmul float [[X:%.*]], 0.000000e+00 -; CHECK-NEXT: [[RET:%.*]] = fptosi float [[SEL]] to i32 -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: ret i32 0 ; %sel = fmul float %x, 0.000000e+00 %ret = fptosi float %sel to i32 diff --git a/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll b/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll index 60dc0edbe3063..62945d8eba6da 100644 --- a/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll +++ b/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll @@ -256,7 +256,6 @@ define void @add_unique_indf32(ptr noalias nocapture %a, i64 %n) { ; CHECK-NEXT: [[TMP7:%.*]] = call <vscale x 4 x i32> @llvm.stepvector.nxv4i32() ; CHECK-NEXT: [[TMP8:%.*]] = uitofp <vscale x 4 x i32> [[TMP7]] to <vscale x 4 x float> ; CHECK-NEXT: [[TMP9:%.*]] = fmul <vscale x 4 x float> [[TMP8]], splat (float 2.000000e+00) -; CHECK-NEXT: [[INDUCTION:%.*]] = fadd <vscale x 4 x float> [[TMP9]], zeroinitializer ; CHECK-NEXT: [[TMP12:%.*]] = uitofp i64 [[TMP3]] to float ; CHECK-NEXT: [[TMP13:%.*]] = fmul float [[TMP12]], 2.000000e+00 ; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x float> poison, float [[TMP13]], i64 0 @@ -264,7 +263,7 @@ define void @add_unique_indf32(ptr noalias nocapture %a, i64 %n) { ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] -; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 4 x float> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] +; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 4 x float> [ [[TMP9]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: store <vscale x 4 x float> [[VEC_IND]], ptr [[TMP14]], align 4 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]] _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
