================
@@ -191,6 +191,7 @@
 ; CHECK-NEXT:       Virtual Register Rewriter
 ; CHECK-NEXT:       Register Allocation Pass Scoring
 ; CHECK-NEXT:       Stack Slot Coloring
+; CHECK-NEXT:       AArch64 SRLT Define Super-Regs Pass
----------------
MacDue wrote:

Is this intentionally only added to the optimized pipeline?

https://github.com/llvm/llvm-project/pull/174188
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