================
@@ -1220,6 +1220,11 @@ class LLVM_ABI TargetRegisterInfo : public
MCRegisterInfo {
return true;
}
+ /// To enable subreg reload of register tuples during RA. This would
+ /// eventually improve the register allocation for the functions that involve
+ /// subreg uses instead of the entire tuple.
+ virtual bool shouldEnableSubRegReload(unsigned SubReg) const { return false;
}
----------------
arsenm wrote:
I'd rather not have a control for this. This is functionally equivalent to is
subreg liveness enabled?
https://github.com/llvm/llvm-project/pull/175002
_______________________________________________
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits