================ ---------------- sdesmalen-arm wrote:
That would introduce regressions because the implicit operands to ORRWrs/ADDWri, at least when generated by the VirtRegRewriter, don't have the `renamable` attribute, even when their sub-register does, e.g.: ``` renamable $w1 = ORRWrr $wzr, renamable $w0, implicit-def $x1 ``` Here `$x1` should have been `renamable` as well, which seems like an existing bug. It seems the check for the opcode here in `isRewritableImplicitDef` is to make sure they can safely be renamed (although it conservatively limits it to only two operations) https://github.com/llvm/llvm-project/pull/174186 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
