https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/176799
Boilerplate change to prepare to take LibcallLoweringInfo from an analysis. For now, it just sets it from the copy inside of TargetLowering. >From c6c082b1cac9ee5eb0b17a01151bfb656741333f Mon Sep 17 00:00:00 2001 From: Matt Arsenault <[email protected]> Date: Mon, 19 Jan 2026 17:07:59 +0100 Subject: [PATCH] FastISel: Thread LibcallLoweringInfo through Boilerplate change to prepare to take LibcallLoweringInfo from an analysis. For now, it just sets it from the copy inside of TargetLowering. --- llvm/include/llvm/CodeGen/FastISel.h | 2 + llvm/include/llvm/CodeGen/TargetLowering.h | 3 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 2 + .../CodeGen/SelectionDAG/SelectionDAGISel.cpp | 5 ++- llvm/lib/Target/AArch64/AArch64FastISel.cpp | 40 ++++++++++--------- .../Target/AArch64/AArch64ISelLowering.cpp | 8 ++-- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 9 +++-- llvm/lib/Target/ARM/ARMFastISel.cpp | 30 +++++++++----- llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 ++-- llvm/lib/Target/ARM/ARMISelLowering.h | 11 +++-- llvm/lib/Target/Mips/MipsFastISel.cpp | 11 +++-- llvm/lib/Target/Mips/MipsISelLowering.cpp | 9 +++-- llvm/lib/Target/Mips/MipsISelLowering.h | 9 +++-- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 23 ++++++----- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 8 ++-- llvm/lib/Target/PowerPC/PPCISelLowering.h | 11 +++-- .../WebAssembly/WebAssemblyFastISel.cpp | 14 ++++--- .../WebAssembly/WebAssemblyISelLowering.cpp | 5 ++- .../WebAssembly/WebAssemblyISelLowering.h | 9 +++-- llvm/lib/Target/X86/X86FastISel.cpp | 14 ++++--- llvm/lib/Target/X86/X86ISelLowering.cpp | 8 ++-- llvm/lib/Target/X86/X86ISelLowering.h | 11 +++-- 22 files changed, 151 insertions(+), 99 deletions(-) diff --git a/llvm/include/llvm/CodeGen/FastISel.h b/llvm/include/llvm/CodeGen/FastISel.h index b9d6694a935f6..9e7ab467f1975 100644 --- a/llvm/include/llvm/CodeGen/FastISel.h +++ b/llvm/include/llvm/CodeGen/FastISel.h @@ -212,6 +212,7 @@ class FastISel { const TargetLowering &TLI; const TargetRegisterInfo &TRI; const TargetLibraryInfo *LibInfo; + const LibcallLoweringInfo *LibcallLowering; bool SkipTargetIndependentISel; /// The position of the last instruction for materializing constants @@ -326,6 +327,7 @@ class FastISel { protected: explicit FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering, bool SkipTargetIndependentISel = false); /// This method is called by target-independent code when the normal diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h index 3bbeee5e1616b..6553f1d479e86 100644 --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -5184,7 +5184,8 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase { /// This method returns a target specific FastISel object, or null if the /// target does not support "fast" ISel. virtual FastISel *createFastISel(FunctionLoweringInfo &, - const TargetLibraryInfo *) const { + const TargetLibraryInfo *, + const LibcallLoweringInfo *) const { return nullptr; } diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp index dd5587625e2aa..f8e1b08276b52 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -1869,6 +1869,7 @@ bool FastISel::selectOperator(const User *I, unsigned Opcode) { FastISel::FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering, bool SkipTargetIndependentISel) : FuncInfo(FuncInfo), MF(FuncInfo.MF), MRI(FuncInfo.MF->getRegInfo()), MFI(FuncInfo.MF->getFrameInfo()), MCP(*FuncInfo.MF->getConstantPool()), @@ -1876,6 +1877,7 @@ FastISel::FastISel(FunctionLoweringInfo &FuncInfo, TII(*MF->getSubtarget().getInstrInfo()), TLI(*MF->getSubtarget().getTargetLowering()), TRI(*MF->getSubtarget().getRegisterInfo()), LibInfo(LibInfo), + LibcallLowering(LibcallLowering), SkipTargetIndependentISel(SkipTargetIndependentISel) {} FastISel::~FastISel() = default; diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index b2b8c6692bf94..b8e18dd4b0241 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -1658,7 +1658,10 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) { FastISel *FastIS = nullptr; if (TM.Options.EnableFastISel) { LLVM_DEBUG(dbgs() << "Enabling fast-isel\n"); - FastIS = TLI->createFastISel(*FuncInfo, LibInfo); + FastIS = TLI->createFastISel( + *FuncInfo, LibInfo, + &TLI->getLibcallLoweringInfo() // FIXME: Take from analysis + ); } ReversePostOrderTraversal<const Function*> RPOT(&Fn); diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp index 0246c7454bf01..7cd32ebe2e2f7 100644 --- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp +++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp @@ -274,8 +274,10 @@ class AArch64FastISel final : public FastISel { Register fastMaterializeFloatZero(const ConstantFP *CF) override; explicit AArch64FastISel(FunctionLoweringInfo &FuncInfo, - const TargetLibraryInfo *LibInfo) - : FastISel(FuncInfo, LibInfo, /*SkipTargetIndependentISel=*/true) { + const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *libcallLowering) + : FastISel(FuncInfo, LibInfo, libcallLowering, + /*SkipTargetIndependentISel=*/true) { Subtarget = &FuncInfo.MF->getSubtarget<AArch64Subtarget>(); Context = &FuncInfo.Fn->getContext(); } @@ -3580,8 +3582,14 @@ bool AArch64FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) { CallLoweringInfo CLI; MCContext &Ctx = MF->getContext(); - CLI.setCallee(DL, Ctx, TLI.getLibcallCallingConv(LC), II->getType(), - TLI.getLibcallName(LC), std::move(Args)); + + RTLIB::LibcallImpl LCImpl = LibcallLowering->getLibcallImpl(LC); + if (LCImpl == RTLIB::Unsupported) + return false; + + CallingConv::ID CC = LibcallLowering->getLibcallImplCallingConv(LCImpl); + StringRef FuncName = RTLIB::RuntimeLibcallsInfo::getLibcallImplName(LCImpl); + CLI.setCallee(DL, Ctx, CC, II->getType(), FuncName, std::move(Args)); if (!lowerCallTo(CLI)) return false; updateValueMap(II, CLI.ResultReg); @@ -4851,17 +4859,10 @@ bool AArch64FastISel::selectFRem(const Instruction *I) { if (!isTypeLegal(I->getType(), RetVT)) return false; - RTLIB::Libcall LC; - switch (RetVT.SimpleTy) { - default: + RTLIB::LibcallImpl LCImpl = + LibcallLowering->getLibcallImpl(RTLIB::getREM(RetVT)); + if (LCImpl == RTLIB::Unsupported) return false; - case MVT::f32: - LC = RTLIB::REM_F32; - break; - case MVT::f64: - LC = RTLIB::REM_F64; - break; - } ArgListTy Args; Args.reserve(I->getNumOperands()); @@ -4872,8 +4873,10 @@ bool AArch64FastISel::selectFRem(const Instruction *I) { CallLoweringInfo CLI; MCContext &Ctx = MF->getContext(); - CLI.setCallee(DL, Ctx, TLI.getLibcallCallingConv(LC), I->getType(), - TLI.getLibcallName(LC), std::move(Args)); + CallingConv::ID CC = LibcallLowering->getLibcallImplCallingConv(LCImpl); + StringRef FuncName = RTLIB::RuntimeLibcallsInfo::getLibcallImplName(LCImpl); + + CLI.setCallee(DL, Ctx, CC, I->getType(), FuncName, std::move(Args)); if (!lowerCallTo(CLI)) return false; updateValueMap(I, CLI.ResultReg); @@ -5189,7 +5192,8 @@ bool AArch64FastISel::fastSelectInstruction(const Instruction *I) { } FastISel *AArch64::createFastISel(FunctionLoweringInfo &FuncInfo, - const TargetLibraryInfo *LibInfo) { + const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering) { SMEAttrs CallerAttrs = FuncInfo.MF->getInfo<AArch64FunctionInfo>()->getSMEFnAttrs(); @@ -5198,5 +5202,5 @@ FastISel *AArch64::createFastISel(FunctionLoweringInfo &FuncInfo, CallerAttrs.hasStreamingCompatibleInterface() || CallerAttrs.hasAgnosticZAInterface()) return nullptr; - return new AArch64FastISel(FuncInfo, LibInfo); + return new AArch64FastISel(FuncInfo, LibInfo, LibcallLowering); } diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index d550dbaf40a4d..eefcf53c18d27 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -2947,10 +2947,10 @@ bool AArch64TargetLowering::allowsMisalignedMemoryAccesses( return true; } -FastISel * -AArch64TargetLowering::createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) const { - return AArch64::createFastISel(funcInfo, libInfo); +FastISel *AArch64TargetLowering::createFastISel( + FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) const { + return AArch64::createFastISel(funcInfo, libInfo, libcallLowering); } MachineBasicBlock * diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h index 1bf36559edd27..8dacd08ddf8a7 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h @@ -137,8 +137,10 @@ class AArch64TargetLowering : public TargetLowering { /// This method returns a target specific FastISel object, or null if the /// target does not support "fast" ISel. - FastISel *createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) const override; + FastISel * + createFastISel(FunctionLoweringInfo &funcInfo, + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) const override; bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override; @@ -931,7 +933,8 @@ class AArch64TargetLowering : public TargetLowering { namespace AArch64 { FastISel *createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo); + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering); } // end namespace AArch64 } // end namespace llvm diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp index 88d3b6f7d5bb9..62288248088e9 100644 --- a/llvm/lib/Target/ARM/ARMFastISel.cpp +++ b/llvm/lib/Target/ARM/ARMFastISel.cpp @@ -146,8 +146,9 @@ class ARMFastISel final : public FastISel { public: explicit ARMFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) - : FastISel(funcInfo, libInfo), + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) + : FastISel(funcInfo, libInfo, libcallLowering), Subtarget(&funcInfo.MF->getSubtarget<ARMSubtarget>()), M(const_cast<Module &>(*funcInfo.Fn->getParent())), TII(*Subtarget->getInstrInfo()), TLI(*Subtarget->getTargetLowering()), @@ -2268,7 +2269,9 @@ Register ARMFastISel::getLibcallReg(const Twine &Name) { // TODO: Try to unify this and the normal call bits for ARM, then try to unify // with X86. bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) { - CallingConv::ID CC = TLI.getLibcallCallingConv(Call); + RTLIB::LibcallImpl LCImpl = LibcallLowering->getLibcallImpl(Call); + if (LCImpl == RTLIB::Unsupported) + return false; // Handle *simple* calls for now. Type *RetTy = I->getType(); @@ -2278,6 +2281,8 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) { else if (!isTypeLegal(RetTy, RetVT)) return false; + CallingConv::ID CC = LibcallLowering->getLibcallImplCallingConv(LCImpl); + // Can't handle non-double multi-reg retvals. if (RetVT != MVT::isVoid && RetVT != MVT::i32) { SmallVector<CCValAssign, 16> RVLocs; @@ -2321,9 +2326,11 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) { RegArgs, CC, NumBytes, false)) return false; + StringRef FuncName = RTLIB::RuntimeLibcallsInfo::getLibcallImplName(LCImpl); + Register CalleeReg; if (Subtarget->genLongCalls()) { - CalleeReg = getLibcallReg(TLI.getLibcallName(Call)); + CalleeReg = getLibcallReg(FuncName); if (!CalleeReg) return false; } @@ -2340,7 +2347,7 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) { constrainOperandRegClass(TII.get(CallOpc), CalleeReg, isThumb2 ? 2 : 0); MIB.addReg(CalleeReg); } else - MIB.addExternalSymbol(TLI.getLibcallName(Call)); + MIB.addExternalSymbol(FuncName.data()); // Add implicit physical register uses to the call. for (Register R : RegArgs) @@ -3150,12 +3157,13 @@ bool ARMFastISel::fastLowerArguments() { namespace llvm { - FastISel *ARM::createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) { - if (funcInfo.MF->getSubtarget<ARMSubtarget>().useFastISel()) - return new ARMFastISel(funcInfo, libInfo); +FastISel *ARM::createFastISel(FunctionLoweringInfo &funcInfo, + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) { + if (funcInfo.MF->getSubtarget<ARMSubtarget>().useFastISel()) + return new ARMFastISel(funcInfo, libInfo, libcallLowering); - return nullptr; - } + return nullptr; +} } // end namespace llvm diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 07d90422cb4ca..8525ed78c4693 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -1551,10 +1551,10 @@ bool ARMTargetLowering::shouldAlignPointerArgs(CallInst *CI, unsigned &MinSize, } // Create a fast isel object. -FastISel * -ARMTargetLowering::createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) const { - return ARM::createFastISel(funcInfo, libInfo); +FastISel *ARMTargetLowering::createFastISel( + FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) const { + return ARM::createFastISel(funcInfo, libInfo, libcallLowering); } Sched::Preference ARMTargetLowering::getSchedulingPreference(SDNode *N) const { diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h index 96d08cc89a6eb..1389f6a23918e 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.h +++ b/llvm/lib/Target/ARM/ARMISelLowering.h @@ -289,8 +289,10 @@ class VectorType; /// createFastISel - This method returns a target specific FastISel object, /// or null if the target does not support "fast" ISel. - FastISel *createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) const override; + FastISel * + createFastISel(FunctionLoweringInfo &funcInfo, + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) const override; Sched::Preference getSchedulingPreference(SDNode *N) const override; @@ -727,8 +729,9 @@ class VectorType; namespace ARM { - FastISel *createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo); + FastISel *createFastISel(FunctionLoweringInfo &funcInfo, + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering); } // end namespace ARM diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp index 06210b6b91b93..ece81880964c7 100644 --- a/llvm/lib/Target/Mips/MipsFastISel.cpp +++ b/llvm/lib/Target/Mips/MipsFastISel.cpp @@ -246,8 +246,10 @@ class MipsFastISel final : public FastISel { public: // Backend specific FastISel code. explicit MipsFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) - : FastISel(funcInfo, libInfo), TM(funcInfo.MF->getTarget()), + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) + : FastISel(funcInfo, libInfo, libcallLowering), + TM(funcInfo.MF->getTarget()), Subtarget(&funcInfo.MF->getSubtarget<MipsSubtarget>()), TII(*Subtarget->getInstrInfo()), TLI(*Subtarget->getTargetLowering()) { MFI = funcInfo.MF->getInfo<MipsFunctionInfo>(); @@ -2161,8 +2163,9 @@ unsigned MipsFastISel::fastEmitInst_rr(unsigned MachineInstOpcode, namespace llvm { FastISel *Mips::createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) { - return new MipsFastISel(funcInfo, libInfo); + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) { + return new MipsFastISel(funcInfo, libInfo, libcallLowering); } } // end namespace llvm diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index dbbeb75e673c3..6e1eeba4c25a5 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -441,9 +441,9 @@ MipsTargetLowering::create(const MipsTargetMachine &TM, } // Create a fast isel object. -FastISel * -MipsTargetLowering::createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) const { +FastISel *MipsTargetLowering::createFastISel( + FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) const { const MipsTargetMachine &TM = static_cast<const MipsTargetMachine &>(funcInfo.MF->getTarget()); @@ -458,7 +458,8 @@ MipsTargetLowering::createFastISel(FunctionLoweringInfo &funcInfo, Subtarget.useXGOT()) UseFastISel = false; - return UseFastISel ? Mips::createFastISel(funcInfo, libInfo) : nullptr; + return UseFastISel ? Mips::createFastISel(funcInfo, libInfo, libcallLowering) + : nullptr; } EVT MipsTargetLowering::getSetCCResultType(const DataLayout &, LLVMContext &, diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h b/llvm/lib/Target/Mips/MipsISelLowering.h index 8302835a3ae9f..806fb59f5ff3e 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.h +++ b/llvm/lib/Target/Mips/MipsISelLowering.h @@ -67,8 +67,10 @@ class TargetRegisterClass; /// createFastISel - This method returns a target specific FastISel object, /// or null if the target does not support "fast" ISel. - FastISel *createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) const override; + FastISel * + createFastISel(FunctionLoweringInfo &funcInfo, + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) const override; MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override { return MVT::i32; @@ -545,7 +547,8 @@ class TargetRegisterClass; namespace Mips { FastISel *createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo); + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering); } // end namespace Mips diff --git a/llvm/lib/Target/PowerPC/PPCFastISel.cpp b/llvm/lib/Target/PowerPC/PPCFastISel.cpp index ca3fe18273ff5..4068188acb653 100644 --- a/llvm/lib/Target/PowerPC/PPCFastISel.cpp +++ b/llvm/lib/Target/PowerPC/PPCFastISel.cpp @@ -89,8 +89,10 @@ class PPCFastISel final : public FastISel { public: explicit PPCFastISel(FunctionLoweringInfo &FuncInfo, - const TargetLibraryInfo *LibInfo) - : FastISel(FuncInfo, LibInfo), TM(FuncInfo.MF->getTarget()), + const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering) + : FastISel(FuncInfo, LibInfo, LibcallLowering), + TM(FuncInfo.MF->getTarget()), Subtarget(&FuncInfo.MF->getSubtarget<PPCSubtarget>()), PPCFuncInfo(FuncInfo.MF->getInfo<PPCFunctionInfo>()), TII(*Subtarget->getInstrInfo()), TLI(*Subtarget->getTargetLowering()), @@ -2462,12 +2464,13 @@ Register PPCFastISel::fastEmitInst_rr(unsigned MachineInstOpcode, namespace llvm { // Create the fast instruction selector for PowerPC64 ELF. - FastISel *PPC::createFastISel(FunctionLoweringInfo &FuncInfo, - const TargetLibraryInfo *LibInfo) { - // Only available on 64-bit for now. - const PPCSubtarget &Subtarget = FuncInfo.MF->getSubtarget<PPCSubtarget>(); - if (Subtarget.isPPC64()) - return new PPCFastISel(FuncInfo, LibInfo); - return nullptr; - } +FastISel *PPC::createFastISel(FunctionLoweringInfo &FuncInfo, + const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering) { + // Only available on 64-bit for now. + const PPCSubtarget &Subtarget = FuncInfo.MF->getSubtarget<PPCSubtarget>(); + if (Subtarget.isPPC64()) + return new PPCFastISel(FuncInfo, LibInfo, LibcallLowering); + return nullptr; +} } diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index ac70eca8f9781..641b7804097f8 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -19027,10 +19027,10 @@ Sched::Preference PPCTargetLowering::getSchedulingPreference(SDNode *N) const { } // Create a fast isel object. -FastISel * -PPCTargetLowering::createFastISel(FunctionLoweringInfo &FuncInfo, - const TargetLibraryInfo *LibInfo) const { - return PPC::createFastISel(FuncInfo, LibInfo); +FastISel *PPCTargetLowering::createFastISel( + FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering) const { + return PPC::createFastISel(FuncInfo, LibInfo, LibcallLowering); } // 'Inverted' means the FMA opcode after negating one multiplicand. diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h index fe883eacb44c4..52e79469c78da 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.h +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h @@ -535,8 +535,10 @@ namespace llvm { /// createFastISel - This method returns a target-specific FastISel object, /// or null if the target does not support "fast" instruction selection. - FastISel *createFastISel(FunctionLoweringInfo &FuncInfo, - const TargetLibraryInfo *LibInfo) const override; + FastISel * + createFastISel(FunctionLoweringInfo &FuncInfo, + const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering) const override; /// Returns true if an argument of type Ty needs to be passed in a /// contiguous block of registers in calling convention CallConv. @@ -935,8 +937,9 @@ namespace llvm { namespace PPC { - FastISel *createFastISel(FunctionLoweringInfo &FuncInfo, - const TargetLibraryInfo *LibInfo); + FastISel *createFastISel(FunctionLoweringInfo &FuncInfo, + const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering); } // end namespace PPC diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp index 9d8e09c09e9ea..2aef3217f5e19 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp @@ -194,8 +194,10 @@ class WebAssemblyFastISel final : public FastISel { public: // Backend specific FastISel code. WebAssemblyFastISel(FunctionLoweringInfo &FuncInfo, - const TargetLibraryInfo *LibInfo) - : FastISel(FuncInfo, LibInfo, /*SkipTargetIndependentISel=*/true) { + const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering) + : FastISel(FuncInfo, LibInfo, LibcallLowering, + /*SkipTargetIndependentISel=*/true) { Subtarget = &FuncInfo.MF->getSubtarget<WebAssemblySubtarget>(); Context = &FuncInfo.Fn->getContext(); } @@ -1464,7 +1466,9 @@ bool WebAssemblyFastISel::fastSelectInstruction(const Instruction *I) { return selectOperator(I, I->getOpcode()); } -FastISel *WebAssembly::createFastISel(FunctionLoweringInfo &FuncInfo, - const TargetLibraryInfo *LibInfo) { - return new WebAssemblyFastISel(FuncInfo, LibInfo); +FastISel * +WebAssembly::createFastISel(FunctionLoweringInfo &FuncInfo, + const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering) { + return new WebAssemblyFastISel(FuncInfo, LibInfo, LibcallLowering); } diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index f72088871ca5c..3b2e0de9589a6 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -480,8 +480,9 @@ bool WebAssemblyTargetLowering::shouldScalarizeBinop(SDValue VecOp) const { } FastISel *WebAssemblyTargetLowering::createFastISel( - FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo) const { - return WebAssembly::createFastISel(FuncInfo, LibInfo); + FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering) const { + return WebAssembly::createFastISel(FuncInfo, LibInfo, LibcallLowering); } MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout & /*DL*/, diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h index 948ff350c8124..7c99e6277a7a3 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h @@ -37,8 +37,10 @@ class WebAssemblyTargetLowering final : public TargetLowering { AtomicExpansionKind shouldExpandAtomicRMWInIR(const AtomicRMWInst *) const override; bool shouldScalarizeBinop(SDValue VecOp) const override; - FastISel *createFastISel(FunctionLoweringInfo &FuncInfo, - const TargetLibraryInfo *LibInfo) const override; + FastISel * + createFastISel(FunctionLoweringInfo &FuncInfo, + const TargetLibraryInfo *LibInfo, + const LibcallLoweringInfo *LibcallLowering) const override; MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override; MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr &MI, @@ -131,7 +133,8 @@ class WebAssemblyTargetLowering final : public TargetLowering { namespace WebAssembly { FastISel *createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo); + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering); } // end namespace WebAssembly } // end namespace llvm diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index c69ca77031495..e1769edbc887b 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -51,8 +51,9 @@ class X86FastISel final : public FastISel { public: explicit X86FastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) - : FastISel(funcInfo, libInfo) { + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) + : FastISel(funcInfo, libInfo, libcallLowering) { Subtarget = &funcInfo.MF->getSubtarget<X86Subtarget>(); } @@ -4100,8 +4101,9 @@ Register X86FastISel::fastEmitInst_rrrr(unsigned MachineInstOpcode, } namespace llvm { - FastISel *X86::createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) { - return new X86FastISel(funcInfo, libInfo); - } +FastISel *X86::createFastISel(FunctionLoweringInfo &funcInfo, + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) { + return new X86FastISel(funcInfo, libInfo, libcallLowering); +} } diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 20330acdc8be5..f69d3814b1873 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -2813,10 +2813,10 @@ X86TargetLowering::getPreferredVectorAction(MVT VT) const { return TargetLoweringBase::getPreferredVectorAction(VT); } -FastISel * -X86TargetLowering::createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) const { - return X86::createFastISel(funcInfo, libInfo); +FastISel *X86TargetLowering::createFastISel( + FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) const { + return X86::createFastISel(funcInfo, libInfo, libcallLowering); } //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h index 8881dc3ea1912..31545ee016fe7 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.h +++ b/llvm/lib/Target/X86/X86ISelLowering.h @@ -1611,8 +1611,10 @@ namespace llvm { /// This method returns a target specific FastISel object, /// or null if the target does not support "fast" ISel. - FastISel *createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo) const override; + FastISel * + createFastISel(FunctionLoweringInfo &funcInfo, + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering) const override; /// If the target has a standard location for the stack protector cookie, /// returns the address of that location. Otherwise, returns nullptr. @@ -1959,8 +1961,9 @@ namespace llvm { }; namespace X86 { - FastISel *createFastISel(FunctionLoweringInfo &funcInfo, - const TargetLibraryInfo *libInfo); + FastISel *createFastISel(FunctionLoweringInfo &funcInfo, + const TargetLibraryInfo *libInfo, + const LibcallLoweringInfo *libcallLowering); } // end namespace X86 // X86 specific Gather/Scatter nodes. _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
