https://github.com/vikramRH updated https://github.com/llvm/llvm-project/pull/173489
>From 0918dc1c25f2db512f2ceb3ee7685ccd774d6c18 Mon Sep 17 00:00:00 2001 From: vikhegde <[email protected]> Date: Wed, 24 Dec 2025 12:03:33 +0530 Subject: [PATCH] [CodeGen][NPM] Add "PhysicalRegisterUsageAnalysis" once --- llvm/include/llvm/Passes/CodeGenPassBuilder.h | 5 +---- llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll | 15 ++++++--------- 2 files changed, 7 insertions(+), 13 deletions(-) diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h index 83b3f4f8b5720..3b6abd993b5b6 100644 --- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h +++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h @@ -968,7 +968,7 @@ Error CodeGenPassBuilder<Derived, TargetMachineT>::addMachinePasses( if (TM.Options.EnableIPRA) { flushFPMsToMPM(PMW); addModulePass(RequireAnalysisPass<PhysicalRegisterUsageAnalysis, Module>(), - PMW); + PMW, /*Force=*/true); addMachineFunctionPass(RegUsageInfoPropagationPass(), PMW); } // Run pre-ra passes. @@ -1039,9 +1039,6 @@ Error CodeGenPassBuilder<Derived, TargetMachineT>::addMachinePasses( if (TM.Options.EnableIPRA) { // Collect register usage information and produce a register mask of // clobbered registers, to be used to optimize call sites. - flushFPMsToMPM(PMW); - addModulePass(RequireAnalysisPass<PhysicalRegisterUsageAnalysis, Module>(), - PMW); addMachineFunctionPass(RegUsageInfoCollectorPass(), PMW); // If -print-regusage is specified, print the collected register usage info. if (Opt.PrintRegUsage) { diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll index f65b5ce56cffe..f2192bd0d1308 100644 --- a/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll +++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll @@ -76,9 +76,8 @@ ; GCN-O0-NEXT:post-RA-hazard-rec ; GCN-O0-NEXT:amdgpu-wait-sgpr-hazards ; GCN-O0-NEXT:amdgpu-lower-vgpr-encoding -; GCN-O0-NEXT:branch-relaxation))) -; GCN-O0-NEXT:require<reg-usage> -; GCN-O0-NEXT:cgscc(function(machine-function(reg-usage-collector +; GCN-O0-NEXT:branch-relaxation +; GCN-O0-NEXT:reg-usage-collector ; GCN-O0-NEXT:remove-loads-into-fake-uses ; GCN-O0-NEXT:live-debug-values ; GCN-O0-NEXT:machine-sanmd @@ -249,9 +248,8 @@ ; GCN-O2-NEXT:amdgpu-wait-sgpr-hazards ; GCN-O2-NEXT:amdgpu-lower-vgpr-encoding ; GCN-O2-NEXT:amdgpu-insert-delay-alu -; GCN-O2-NEXT:branch-relaxation))) -; GCN-O2-NEXT:require<reg-usage> -; GCN-O2-NEXT:cgscc(function(machine-function(reg-usage-collector +; GCN-O2-NEXT:branch-relaxation +; GCN-O2-NEXT:reg-usage-collector ; GCN-O2-NEXT:remove-loads-into-fake-uses ; GCN-O2-NEXT:live-debug-values ; GCN-O2-NEXT:machine-sanmd @@ -422,9 +420,8 @@ ; GCN-O3-NEXT:amdgpu-wait-sgpr-hazards ; GCN-O3-NEXT:amdgpu-lower-vgpr-encoding ; GCN-O3-NEXT:amdgpu-insert-delay-alu -; GCN-O3-NEXT:branch-relaxation))) -; GCN-O3-NEXT:require<reg-usage> -; GCN-O3-NEXT:cgscc(function(machine-function(reg-usage-collector +; GCN-O3-NEXT:branch-relaxation +; GCN-O3-NEXT:reg-usage-collector ; GCN-O3-NEXT:remove-loads-into-fake-uses ; GCN-O3-NEXT:live-debug-values ; GCN-O3-NEXT:machine-sanmd _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
