https://github.com/c-rhodes updated https://github.com/llvm/llvm-project/pull/178501
>From 0dd61b2ff5901c6c44097a47088b89c7b10a28d1 Mon Sep 17 00:00:00 2001 From: hanbeom <[email protected]> Date: Wed, 28 Jan 2026 20:45:04 +0900 Subject: [PATCH] [WebAssembly] Fix crash in ReplaceNodeResults for ANY_EXTEND_VECTOR_INREG (#178374) Fixes a crash during type legalization by allowing ISD::ANY_EXTEND_VECTOR_INREG to fall back to default expansion instead of hitting llvm_unreachable. Fixed: #177209 (cherry picked from commit 16d8d4b84edd257a81b243767d7b6bd62bbfb9fa) --- .../WebAssembly/WebAssemblyISelLowering.cpp | 1 + .../CodeGen/WebAssembly/simd-shuffle-widen.ll | 50 +++++++++++++++++++ 2 files changed, 51 insertions(+) create mode 100644 llvm/test/CodeGen/WebAssembly/simd-shuffle-widen.ll diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index a2557f45395c2..0355d1866eea8 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -1669,6 +1669,7 @@ void WebAssemblyTargetLowering::ReplaceNodeResults( // SIGN_EXTEND_INREG, but for non-vector sign extends the result might be an // illegal type. break; + case ISD::ANY_EXTEND_VECTOR_INREG: case ISD::SIGN_EXTEND_VECTOR_INREG: case ISD::ZERO_EXTEND_VECTOR_INREG: // Do not add any results, signifying that N should not be custom lowered. diff --git a/llvm/test/CodeGen/WebAssembly/simd-shuffle-widen.ll b/llvm/test/CodeGen/WebAssembly/simd-shuffle-widen.ll new file mode 100644 index 0000000000000..86d3d5ed829b8 --- /dev/null +++ b/llvm/test/CodeGen/WebAssembly/simd-shuffle-widen.ll @@ -0,0 +1,50 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mattr=+simd128 -verify-machineinstrs | FileCheck %s + +target triple = "wasm32-unknown-unknown" + +define <128 x i1> @wide_sv_v8i1_v128i1(<8 x i1> %cmp.i) { +; CHECK-LABEL: wide_sv_v8i1_v128i1: +; CHECK: .functype wide_sv_v8i1_v128i1 (i32, v128) -> () +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get 0 +; CHECK-NEXT: local.get 1 +; CHECK-NEXT: i16x8.extract_lane_u 0 +; CHECK-NEXT: i32x4.splat +; CHECK-NEXT: local.get 1 +; CHECK-NEXT: i16x8.extract_lane_u 1 +; CHECK-NEXT: i32x4.replace_lane 1 +; CHECK-NEXT: local.get 1 +; CHECK-NEXT: i16x8.extract_lane_u 2 +; CHECK-NEXT: i32x4.replace_lane 2 +; CHECK-NEXT: local.get 1 +; CHECK-NEXT: i16x8.extract_lane_u 3 +; CHECK-NEXT: i32x4.replace_lane 3 +; CHECK-NEXT: v128.store 0 +; CHECK-NEXT: # fallthrough-return + %.splat = shufflevector <8 x i1> %cmp.i, <8 x i1> zeroinitializer, <128 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 2, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison> + ret <128 x i1> %.splat +} + +define <128 x i1> @wide_sv_v16i1_v128i1(<16 x i1> %cmp.i) { +; CHECK-LABEL: wide_sv_v16i1_v128i1: +; CHECK: .functype wide_sv_v16i1_v128i1 (i32, v128) -> () +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get 0 +; CHECK-NEXT: local.get 1 +; CHECK-NEXT: i8x16.extract_lane_u 0 +; CHECK-NEXT: i32x4.splat +; CHECK-NEXT: local.get 1 +; CHECK-NEXT: i8x16.extract_lane_u 1 +; CHECK-NEXT: i32x4.replace_lane 1 +; CHECK-NEXT: local.get 1 +; CHECK-NEXT: i8x16.extract_lane_u 2 +; CHECK-NEXT: i32x4.replace_lane 2 +; CHECK-NEXT: local.get 1 +; CHECK-NEXT: i8x16.extract_lane_u 3 +; CHECK-NEXT: i32x4.replace_lane 3 +; CHECK-NEXT: v128.store 0 +; CHECK-NEXT: # fallthrough-return + %.splat = shufflevector <16 x i1> %cmp.i, <16 x i1> zeroinitializer, <128 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 2, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison> + ret <128 x i1> %.splat +} _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
