================
@@ -97,6 +99,28 @@ void GCNRegPressure::inc(unsigned Reg,
Value[RegKind] += Sign;
}
+void GCNRegPressure::inc(MCRegister Reg, bool IsAdd,
+ const MachineRegisterInfo &MRI) {
+ if (!MRI.isAllocatable(Reg))
+ return;
+ const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
+ const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
+ if (!RC)
+ return;
+ const SIRegisterInfo *STI = static_cast<const SIRegisterInfo *>(TRI);
+ unsigned RegKind = getRegKind(RC, STI);
+ unsigned NumRegs = divideCeil(TRI->getRegSizeInBits(*RC), 32);
+ int Sign = IsAdd ? 1 : -1;
+
+ if (TRI->getRegSizeInBits(*RC) != 32) {
+ unsigned TupleIdx = TOTAL_KINDS + RegKind;
+ Value[TupleIdx] += Sign * TRI->getRegClassWeight(RC).RegWeight;
+ Value[RegKind] += Sign * static_cast<int>(NumRegs);
+ } else {
+ Value[RegKind] += Sign;
+ }
----------------
arsenm wrote:
Don't need to make this conditional on the size, just unconditionally use the
weight / num regs?
https://github.com/llvm/llvm-project/pull/184275
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