llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-systemz Author: Jonas Paulsson (JonPsson1) <details> <summary>Changes</summary> Unfortunately this backport to the 22 branch becomes a bit involved. It seems it requires four separate commits (per this branch): 1 pre-commit of tests 2 actual patch (5213037) 3 post-commit that fixes tests (remove superfluous args). 4 Fixing of memmove-01.ll to work on this branch. Not quite sure how to proceed, would it work to commit this branch as a single backport-commit? @<!-- -->uweigand @<!-- -->dyung --- Patch is 128.40 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/196359.diff 4 Files Affected: - (modified) llvm/lib/Target/SystemZ/SystemZISelLowering.cpp (+17-9) - (modified) llvm/test/CodeGen/SystemZ/memcpy-03.ll (+546-102) - (added) llvm/test/CodeGen/SystemZ/memmove-01.ll (+1090) - (modified) llvm/test/CodeGen/SystemZ/memset-08.ll (+1800-218) ``````````diff diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp index f9a41cbeec004..4c8f70503df4a 100644 --- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -830,6 +830,10 @@ SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &TM, MaxStoresPerMemcpy = Subtarget.hasVector() ? 2 : 0; MaxStoresPerMemcpyOptSize = 0; + // Same with memmove. + MaxStoresPerMemmove = Subtarget.hasVector() ? 2 : 0; + MaxStoresPerMemmoveOptSize = 0; + // The main memset sequence is a byte store followed by an MVC. // Two STC or MV..I stores win over that, but the kind of fused stores // generated by target-independent code don't when the byte value is @@ -1473,17 +1477,21 @@ bool SystemZTargetLowering::findOptimalMemOpLowering( LLVMContext &Context, std::vector<EVT> &MemOps, unsigned Limit, const MemOp &Op, unsigned DstAS, unsigned SrcAS, const AttributeList &FuncAttributes) const { + + assert(Limit != ~0U && + "Expected EmitTargetCodeForMemXXX() to handle AlwaysInline cases."); + + if (Op.isZeroMemset()) + return false; // Memset zero: Use XC. + const int MVCFastLen = 16; + // Use MVC up to 16 bytes. Small memset uses STC/MVI for first byte. + if ((Op.isMemset() ? Op.size() - 1 : Op.size()) <= MVCFastLen) + return false; - if (Limit != ~unsigned(0)) { - // Don't expand Op into scalar loads/stores in these cases: - if (Op.isMemcpy() && Op.allowOverlap() && Op.size() <= MVCFastLen) - return false; // Small memcpy: Use MVC - if (Op.isMemset() && Op.size() - 1 <= MVCFastLen) - return false; // Small memset (first byte with STC/MVI): Use MVC - if (Op.isZeroMemset()) - return false; // Memset zero: Use XC - } + // Avoid unaligned VL/VST:s. + if (!Op.isAligned(Align(8)) || (Op.size() >= 25 && Op.size() <= 31)) + return false; return TargetLowering::findOptimalMemOpLowering(Context, MemOps, Limit, Op, DstAS, SrcAS, FuncAttributes); diff --git a/llvm/test/CodeGen/SystemZ/memcpy-03.ll b/llvm/test/CodeGen/SystemZ/memcpy-03.ll index c703aef275322..213764e79ffb2 100644 --- a/llvm/test/CodeGen/SystemZ/memcpy-03.ll +++ b/llvm/test/CodeGen/SystemZ/memcpy-03.ll @@ -1,217 +1,661 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mcpu=z15 < %s -mtriple=s390x-linux-gnu | FileCheck %s +; RUN: llc -mcpu=z17 < %s -mtriple=s390x-linux-gnu | FileCheck %s ; -; Test memcpys of small constant lengths that should not be done with MVC. +; Test non-volatile memcpys of small constant lengths in both aligned and +; unaligned cases. declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind -define void @fun16(ptr %Src, ptr %Dst, i8 %val) { +define void @fun1(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun1: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(1,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 1, i1 false) + ret void +} + +define void @fun1_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun1_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(1,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 1, i1 false) + ret void +} + +define void @fun2(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun2: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(2,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 2, i1 false) + ret void +} + +define void @fun2_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun2_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(2,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 2, i1 false) + ret void +} + +define void @fun3(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun3: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(3,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 3, i1 false) + ret void +} + +define void @fun3_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun3_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(3,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 3, i1 false) + ret void +} + +define void @fun4(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun4: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(4,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 4, i1 false) + ret void +} + +define void @fun4_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun4_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(4,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 4, i1 false) + ret void +} + +define void @fun5(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun5: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(5,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 5, i1 false) + ret void +} + +define void @fun5_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun5_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(5,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 5, i1 false) + ret void +} + +define void @fun6(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun6: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(6,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 6, i1 false) + ret void +} + +define void @fun6_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun6_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(6,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 6, i1 false) + ret void +} + +define void @fun7(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun7: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(7,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 7, i1 false) + ret void +} + +define void @fun7_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun7_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(7,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 7, i1 false) + ret void +} + +define void @fun8(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun8: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(8,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 8, i1 false) + ret void +} + +define void @fun8_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun8_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(8,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 8, i1 false) + ret void +} + +define void @fun9(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun9: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(9,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 9, i1 false) + ret void +} + +define void @fun9_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun9_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(9,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 9, i1 false) + ret void +} + +define void @fun10(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun10: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(10,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 10, i1 false) + ret void +} + +define void @fun10_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun10_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(10,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 10, i1 false) + ret void +} + +define void @fun11(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun11: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(11,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 11, i1 false) + ret void +} + +define void @fun11_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun11_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(11,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 11, i1 false) + ret void +} + +define void @fun12(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun12: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(12,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 12, i1 false) + ret void +} + +define void @fun12_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun12_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(12,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 12, i1 false) + ret void +} + +define void @fun13(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun13: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(13,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 13, i1 false) + ret void +} + +define void @fun13_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun13_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(13,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 13, i1 false) + ret void +} + +define void @fun14(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun14: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(14,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 14, i1 false) + ret void +} + +define void @fun14_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun14_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(14,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 14, i1 false) + ret void +} + +define void @fun15(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun15: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(15,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 15, i1 false) + ret void +} + +define void @fun15_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun15_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(15,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 15, i1 false) + ret void +} + +define void @fun16(ptr %Dst, ptr %Src) { ; CHECK-LABEL: fun16: ; CHECK: # %bb.0: -; CHECK-NEXT: mvc 0(16,%r3), 0(%r2) +; CHECK-NEXT: mvc 0(16,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 16, i1 false) + ret void +} + +define void @fun16_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun16_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(16,%r2), 0(%r3) ; CHECK-NEXT: br %r14 - call void @llvm.memcpy.p0.p0.i64(ptr align 16 %Dst, ptr align 16 %Src, i64 16, i1 false) + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 16, i1 false) ret void } -define void @fun17(ptr %Src, ptr %Dst, i8 %val) { +define void @fun17(ptr %Dst, ptr %Src) { ; CHECK-LABEL: fun17: ; CHECK: # %bb.0: -; CHECK-NEXT: lb %r0, 16(%r2) -; CHECK-NEXT: stc %r0, 16(%r3) -; CHECK-NEXT: vl %v0, 0(%r2), 4 -; CHECK-NEXT: vst %v0, 0(%r3), 4 +; CHECK-NEXT: lb %r0, 16(%r3) +; CHECK-NEXT: stc %r0, 16(%r2) +; CHECK-NEXT: vl %v0, 0(%r3), 3 +; CHECK-NEXT: vst %v0, 0(%r2), 3 +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 17, i1 false) + ret void +} + +define void @fun17_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun17_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(17,%r2), 0(%r3) ; CHECK-NEXT: br %r14 - call void @llvm.memcpy.p0.p0.i64(ptr align 16 %Dst, ptr align 16 %Src, i64 17, i1 false) + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 17, i1 false) ret void } -define void @fun18(ptr %Src, ptr %Dst, i8 %val) { +define void @fun17_unalignedSrc(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun17_unalignedSrc: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(17,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 16 %Dst, ptr align 4 %Src, i64 17, i1 false) + ret void +} + +define void @fun18(ptr %Dst, ptr %Src) { ; CHECK-LABEL: fun18: ; CHECK: # %bb.0: -; CHECK-NEXT: lh %r0, 16(%r2) -; CHECK-NEXT: sth %r0, 16(%r3) -; CHECK-NEXT: vl %v0, 0(%r2), 4 -; CHECK-NEXT: vst %v0, 0(%r3), 4 +; CHECK-NEXT: lh %r0, 16(%r3) +; CHECK-NEXT: sth %r0, 16(%r2) +; CHECK-NEXT: vl %v0, 0(%r3), 3 +; CHECK-NEXT: vst %v0, 0(%r2), 3 ; CHECK-NEXT: br %r14 - call void @llvm.memcpy.p0.p0.i64(ptr align 16 %Dst, ptr align 16 %Src, i64 18, i1 false) + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 18, i1 false) ret void } -define void @fun19(ptr %Src, ptr %Dst, i8 %val) { +define void @fun18_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun18_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(18,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 18, i1 false) + ret void +} + +define void @fun18_unalignedDst(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun18_unalignedDst: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(18,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 2 %Dst, ptr align 16 %Src, i64 18, i1 false) + ret void +} + +define void @fun19(ptr %Dst, ptr %Src) { ; CHECK-LABEL: fun19: ; CHECK: # %bb.0: -; CHECK-NEXT: l %r0, 15(%r2) -; CHECK-NEXT: st %r0, 15(%r3) -; CHECK-NEXT: vl %v0, 0(%r2), 4 -; CHECK-NEXT: vst %v0, 0(%r3), 4 +; CHECK-NEXT: l %r0, 15(%r3) +; CHECK-NEXT: st %r0, 15(%r2) +; CHECK-NEXT: vl %v0, 0(%r3), 3 +; CHECK-NEXT: vst %v0, 0(%r2), 3 ; CHECK-NEXT: br %r14 - call void @llvm.memcpy.p0.p0.i64(ptr align 16 %Dst, ptr align 16 %Src, i64 19, i1 false) + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 19, i1 false) ret void } -define void @fun20(ptr %Src, ptr %Dst, i8 %val) { +define void @fun19_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun19_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(19,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 19, i1 false) + ret void +} + +define void @fun20(ptr %Dst, ptr %Src) { ; CHECK-LABEL: fun20: ; CHECK: # %bb.0: -; CHECK-NEXT: l %r0, 16(%r2) -; CHECK-NEXT: st %r0, 16(%r3) +; CHECK-NEXT: l %r0, 16(%r3) +; CHECK-NEXT: st %r0, 16(%r2) +; CHECK-NEXT: vl %v0, 0(%r3), 3 +; CHECK-NEXT: vst %v0, 0(%r2), 3 +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 20, i1 false) + ret void +} + +define void @fun20_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun20_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(20,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 20, i1 false) + ret void +} + +define void @fun20_localDst(ptr %Src) { +; CHECK-LABEL: fun20_localDst: +; CHECK: # %bb.0: +; CHECK-NEXT: aghi %r15, -184 +; CHECK-NEXT: .cfi_def_cfa_offset 344 ; CHECK-NEXT: vl %v0, 0(%r2), 4 -; CHECK-NEXT: vst %v0, 0(%r3), 4 +; CHECK-NEXT: vst %v0, 164(%r15), 4 +; CHECK-NEXT: mvc 180(4,%r15), 16(%r2) +; CHECK-NEXT: aghi %r15, 184 ; CHECK-NEXT: br %r14 + %Dst = alloca [20 x i8] call void @llvm.memcpy.p0.p0.i64(ptr align 16 %Dst, ptr align 16 %Src, i64 20, i1 false) ret void } -define void @fun21(ptr %Src, ptr %Dst, i8 %val) { +define void @fun21(ptr %Dst, ptr %Src) { ; CHECK-LABEL: fun21: ; CHECK: # %bb.0: -; CHECK-NEXT: lg %r0, 13(%r2) -; CHECK-NEXT: stg %r0, 13(%r3) -; CHECK-NEXT: vl %v0, 0(%r2), 4 -; CHECK-NEXT: vst %v0, 0(%r3), 4 +; CHECK-NEXT: lg %r0, 13(%r3) +; CHECK-NEXT: stg %r0, 13(%r2) +; CHECK-NEXT: vl %v0, 0(%r3), 3 +; CHECK-NEXT: vst %v0, 0(%r2), 3 ; CHECK-NEXT: br %r14 - call void @llvm.memcpy.p0.p0.i64(ptr align 16 %Dst, ptr align 16 %Src, i64 21, i1 false) + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 21, i1 false) ret void } -define void @fun22(ptr %Src, ptr %Dst, i8 %val) { +define void @fun21_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun21_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(21,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 21, i1 false) + ret void +} + +define void @fun22(ptr %Dst, ptr %Src) { ; CHECK-LABEL: fun22: ; CHECK: # %bb.0: -; CHECK-NEXT: lg %r0, 14(%r2) -; CHECK-NEXT: stg %r0, 14(%r3) -; CHECK-NEXT: vl %v0, 0(%r2), 4 -; CHECK-NEXT: vst %v0, 0(%r3), 4 +; CHECK-NEXT: lg %r0, 14(%r3) +; CHECK-NEXT: stg %r0, 14(%r2) +; CHECK-NEXT: vl %v0, 0(%r3), 3 +; CHECK-NEXT: vst %v0, 0(%r2), 3 +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 22, i1 false) + ret void +} + +define void @fun22_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun22_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(22,%r2), 0(%r3) ; CHECK-NEXT: br %r14 - call void @llvm.memcpy.p0.p0.i64(ptr align 16 %Dst, ptr align 16 %Src, i64 22, i1 false) + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 22, i1 false) ret void } -define void @fun23(ptr %Src, ptr %Dst, i8 %val) { +define void @fun23(ptr %Dst, ptr %Src) { ; CHECK-LABEL: fun23: ; CHECK: # %bb.0: -; CHECK-NEXT: lg %r0, 15(%r2) -; CHECK-NEXT: stg %r0, 15(%r3) -; CHECK-NEXT: vl %v0, 0(%r2), 4 -; CHECK-NEXT: vst %v0, 0(%r3), 4 +; CHECK-NEXT: lg %r0, 15(%r3) +; CHECK-NEXT: stg %r0, 15(%r2) +; CHECK-NEXT: vl %v0, 0(%r3), 3 +; CHECK-NEXT: vst %v0, 0(%r2), 3 +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 23, i1 false) + ret void +} + +define void @fun23_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun23_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(23,%r2), 0(%r3) ; CHECK-NEXT: br %r14 - call void @llvm.memcpy.p0.p0.i64(ptr align 16 %Dst, ptr align 16 %Src, i64 23, i1 false) + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 23, i1 false) ret void } -define void @fun24(ptr %Src, ptr %Dst, i8 %val) { +define void @fun24(ptr %Dst, ptr %Src) { ; CHECK-LABEL: fun24: ; CHECK: # %bb.0: -; CHECK-NEXT: lg %r0, 16(%r2) -; CHECK-NEXT: stg %r0, 16(%r3) -; CHECK-NEXT: vl %v0, 0(%r2), 4 -; CHECK-NEXT: vst %v0, 0(%r3), 4 +; CHECK-NEXT: lg %r0, 16(%r3) +; CHECK-NEXT: stg %r0, 16(%r2) +; CHECK-NEXT: vl %v0, 0(%r3), 3 +; CHECK-NEXT: vst %v0, 0(%r2), 3 +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Src, i64 24, i1 false) + ret void +} + +define void @fun24_unaligned(ptr %Dst, ptr %Src) { +; CHECK-LABEL: fun24_unaligned: +; CHECK: # %bb.0: +; CHECK-NEXT: mvc 0(24,%r2), 0(%r3) ; CHECK-NEXT: br %r14 - call void @llvm.memcpy.p0.p0.i64(ptr align 16 %Dst, ptr align 16 %Src, i64 24, i1 false) + call void @llvm.memcpy.p0.p0.i64(ptr align 1 %Dst, ptr align 1 %Src, i64 24, i1 false) ret void } -define void @fun25(ptr %Src, ptr %Dst, i8 %val) { +define void @fun25(ptr %Dst, ptr %Src) { ; CHECK-LABEL: fun25: ; CHECK: # %bb.0: -; CHECK-NEXT: vl %v0, 9(%r2) -; CHECK-NEXT: vst %v0, 9(%r3) -; CHECK-NEXT: vl %v0, 0(%r2), 4 -; CHECK-NEXT: vst %v0, 0(%r3), 4 +; CHECK-NEXT: mvc 0(25,%r2), 0(%r3) +; CHECK-NEXT: br %r14 + call void @llvm.memcpy.p0.p0.i64(ptr align 8 %Dst, ptr align 8 %Sr... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/196359 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
