Author: Thurston Dang Date: 2026-05-24T16:38:26-07:00 New Revision: 643f8c2ee196ac7f6d1c28f3ea2c6dd2f3a6cdc3
URL: https://github.com/llvm/llvm-project/commit/643f8c2ee196ac7f6d1c28f3ea2c6dd2f3a6cdc3 DIFF: https://github.com/llvm/llvm-project/commit/643f8c2ee196ac7f6d1c28f3ea2c6dd2f3a6cdc3.diff LOG: Revert "[LV] Handle chained selects/blends when creating new rdx chain. (#199…" This reverts commit 3f561eab147abf17c1838b4e3dc19837837a9740. Added: Modified: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp Removed: llvm/test/Transforms/LoopVectorize/select-cmp-blend-chain.ll ################################################################################ diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp index adb6de57f029d..40e3eaf319bde 100644 --- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp +++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp @@ -7081,35 +7081,34 @@ void LoopVectorizationPlanner::addReductionResultComputation( NewPhiR->insertBefore(PhiR); VPValue *NewExiting = Builder.createOr(NewPhiR, Cmp); - // The exiting value may flow through a chain of VPBlendRecipe and/or - // VPInstruction::Select recipes before reaching OrigExitingVPV. Clone - // each chain link in topological order so each clone refers to the - // already-rewritten i1 operands via Substitutions. + // The exiting value may flow through a VPBlendRecipe and/or a wrapping + // VPInstruction::Select before reaching OrigExitingVPV. Clone each level + // of the chain with the i1 substitutions propagated through. DenseMap<VPValue *, VPValue *> Substitutions = {{AnyOfSelect, NewExiting}, {PhiR, NewPhiR}}; - std::function<void(VPSingleDefRecipe *)> CloneChain = - [&](VPSingleDefRecipe *Old) { - if (Substitutions.contains(Old)) - return; - SmallVector<VPValue *> NewOps; - for (VPValue *Op : Old->operands()) { - if (isa<VPBlendRecipe>(Op) || - match(Op, m_Select(m_VPValue(), m_VPValue(), m_VPValue()))) - CloneChain(cast<VPSingleDefRecipe>(Op)); - NewOps.push_back(Substitutions.lookup_or(Op, Op)); - } - VPSingleDefRecipe *New; - if (auto *B = dyn_cast<VPBlendRecipe>(Old)) - New = B->cloneWithOperands(NewOps); - else - New = cast<VPInstruction>(Old)->cloneWithOperands(NewOps); - New->insertBefore(Old); - Substitutions[Old] = New; - }; + auto CloneWithSubstitutions = [&](VPSingleDefRecipe *Old) { + SmallVector<VPValue *> NewOps; + for (VPValue *Op : Old->operands()) + NewOps.push_back(Substitutions.lookup_or(Op, Op)); + VPSingleDefRecipe *New; + if (auto *B = dyn_cast<VPBlendRecipe>(Old)) + New = B->cloneWithOperands(NewOps); + else + New = cast<VPInstruction>(Old)->cloneWithOperands(NewOps); + New->insertBefore(Old); + NewExiting = New; + Substitutions[Old] = New; + }; + // If there's an outer Select wrapping a Blend, clone the inner Blend + // first so the outer Select clone can refer to it. if (OrigExitingVPV != AnyOfSelect) { - CloneChain(cast<VPSingleDefRecipe>(OrigExitingVPV)); - NewExiting = Substitutions.lookup(OrigExitingVPV); + VPValue *Inner; + if (match(OrigExitingVPV, + m_Select(m_VPValue(), m_VPValue(Inner), m_VPValue()))) + if (auto *InnerBlend = dyn_cast<VPBlendRecipe>(Inner)) + CloneWithSubstitutions(InnerBlend); + CloneWithSubstitutions(cast<VPSingleDefRecipe>(OrigExitingVPV)); } NewPhiR->setOperand(1, NewExiting); PhiR->replaceAllUsesWith( diff --git a/llvm/test/Transforms/LoopVectorize/select-cmp-blend-chain.ll b/llvm/test/Transforms/LoopVectorize/select-cmp-blend-chain.ll deleted file mode 100644 index 7fa6b545df77c..0000000000000 --- a/llvm/test/Transforms/LoopVectorize/select-cmp-blend-chain.ll +++ /dev/null @@ -1,284 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6 -; RUN: opt -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S %s | FileCheck %s - -; Test case for https://github.com/llvm/llvm-project/issues/199406. -define i32 @anyof_two_blend_chain(i1 %c0, i1 %c1, i32 %n) { -; CHECK-LABEL: define i32 @anyof_two_blend_chain( -; CHECK-SAME: i1 [[C0:%.*]], i1 [[C1:%.*]], i32 [[N:%.*]]) { -; CHECK-NEXT: [[ENTRY:.*]]: -; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N]], i32 1) -; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[SMAX]], 4 -; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] -; CHECK: [[VECTOR_PH]]: -; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[SMAX]], 4 -; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[SMAX]], [[N_MOD_VF]] -; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] -; CHECK: [[VECTOR_BODY]]: -; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] -; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] -; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i1> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PREDPHI1:%.*]], %[[VECTOR_BODY]] ] -; CHECK-NEXT: [[TMP0:%.*]] = icmp eq <4 x i32> [[VEC_IND]], zeroinitializer -; CHECK-NEXT: [[TMP1:%.*]] = or <4 x i1> [[VEC_PHI]], [[TMP0]] -; CHECK-NEXT: [[PREDPHI:%.*]] = select i1 [[C1]], <4 x i1> [[VEC_PHI]], <4 x i1> [[TMP1]] -; CHECK-NEXT: [[PREDPHI1]] = select i1 [[C0]], <4 x i1> [[VEC_PHI]], <4 x i1> [[PREDPHI]] -; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 -; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4) -; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] -; CHECK: [[MIDDLE_BLOCK]]: -; CHECK-NEXT: [[TMP3:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[PREDPHI1]]) -; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[SMAX]], [[N_VEC]] -; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] -; CHECK: [[SCALAR_PH]]: -; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] -; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ 0, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] -; CHECK-NEXT: br label %[[LOOP_HEADER:.*]] -; CHECK: [[LOOP_HEADER]]: -; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] -; CHECK-NEXT: [[RDX:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[RDX_NEXT:%.*]], %[[LOOP_LATCH]] ] -; CHECK-NEXT: br i1 [[C0]], label %[[LOOP_LATCH]], label %[[IF_OUTER:.*]] -; CHECK: [[IF_OUTER]]: -; CHECK-NEXT: br i1 [[C1]], label %[[IF_MERGE:.*]], label %[[IF_INNER:.*]] -; CHECK: [[IF_INNER]]: -; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[IV]], 0 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C]], i32 0, i32 [[RDX]] -; CHECK-NEXT: br label %[[IF_MERGE]] -; CHECK: [[IF_MERGE]]: -; CHECK-NEXT: [[BLEND1:%.*]] = phi i32 [ [[SEL]], %[[IF_INNER]] ], [ [[RDX]], %[[IF_OUTER]] ] -; CHECK-NEXT: br label %[[LOOP_LATCH]] -; CHECK: [[LOOP_LATCH]]: -; CHECK-NEXT: [[RDX_NEXT]] = phi i32 [ [[BLEND1]], %[[IF_MERGE]] ], [ [[RDX]], %[[LOOP_HEADER]] ] -; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 -; CHECK-NEXT: [[EC:%.*]] = icmp slt i32 [[IV_NEXT]], [[N]] -; CHECK-NEXT: br i1 [[EC]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP3:![0-9]+]] -; CHECK: [[EXIT]]: -; CHECK-NEXT: [[RDX_NEXT_LCSSA:%.*]] = phi i32 [ [[RDX_NEXT]], %[[LOOP_LATCH]] ], [ 0, %[[MIDDLE_BLOCK]] ] -; CHECK-NEXT: ret i32 [[RDX_NEXT_LCSSA]] -; -entry: - br label %loop.header - -loop.header: - %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ] - %rdx = phi i32 [ 0, %entry ], [ %rdx.next, %loop.latch ] - br i1 %c0, label %loop.latch, label %if.outer - -if.outer: - br i1 %c1, label %if.merge, label %if.inner - -if.inner: - %c = icmp eq i32 %iv, 0 - %sel = select i1 %c, i32 0, i32 %rdx - br label %if.merge - -if.merge: - %blend1 = phi i32 [ %sel, %if.inner ], [ %rdx, %if.outer ] - br label %loop.latch - -loop.latch: - %rdx.next = phi i32 [ %blend1, %if.merge ], [ %rdx, %loop.header ] - %iv.next = add i32 %iv, 1 - %ec = icmp slt i32 %iv.next, %n - br i1 %ec, label %loop.header, label %exit - -exit: - ret i32 %rdx.next -} - -define i32 @anyof_three_blend_chain(i1 %c0, i1 %c1, i1 %c2, i32 %n) { -; CHECK-LABEL: define i32 @anyof_three_blend_chain( -; CHECK-SAME: i1 [[C0:%.*]], i1 [[C1:%.*]], i1 [[C2:%.*]], i32 [[N:%.*]]) { -; CHECK-NEXT: [[ENTRY:.*]]: -; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N]], i32 1) -; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[SMAX]], 4 -; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] -; CHECK: [[VECTOR_PH]]: -; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[SMAX]], 4 -; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[SMAX]], [[N_MOD_VF]] -; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] -; CHECK: [[VECTOR_BODY]]: -; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] -; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] -; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i1> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PREDPHI2:%.*]], %[[VECTOR_BODY]] ] -; CHECK-NEXT: [[TMP0:%.*]] = icmp eq <4 x i32> [[VEC_IND]], zeroinitializer -; CHECK-NEXT: [[TMP1:%.*]] = or <4 x i1> [[VEC_PHI]], [[TMP0]] -; CHECK-NEXT: [[PREDPHI:%.*]] = select i1 [[C2]], <4 x i1> [[VEC_PHI]], <4 x i1> [[TMP1]] -; CHECK-NEXT: [[PREDPHI1:%.*]] = select i1 [[C1]], <4 x i1> [[VEC_PHI]], <4 x i1> [[PREDPHI]] -; CHECK-NEXT: [[PREDPHI2]] = select i1 [[C0]], <4 x i1> [[VEC_PHI]], <4 x i1> [[PREDPHI1]] -; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 -; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4) -; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] -; CHECK: [[MIDDLE_BLOCK]]: -; CHECK-NEXT: [[TMP3:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[PREDPHI2]]) -; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[SMAX]], [[N_VEC]] -; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] -; CHECK: [[SCALAR_PH]]: -; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] -; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ 0, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] -; CHECK-NEXT: br label %[[LOOP_HEADER:.*]] -; CHECK: [[LOOP_HEADER]]: -; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] -; CHECK-NEXT: [[RDX:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[RDX_NEXT:%.*]], %[[LOOP_LATCH]] ] -; CHECK-NEXT: br i1 [[C0]], label %[[LOOP_LATCH]], label %[[IF1:.*]] -; CHECK: [[IF1]]: -; CHECK-NEXT: br i1 [[C1]], label %[[IF1_MERGE:.*]], label %[[IF2:.*]] -; CHECK: [[IF2]]: -; CHECK-NEXT: br i1 [[C2]], label %[[IF2_MERGE:.*]], label %[[IF3:.*]] -; CHECK: [[IF3]]: -; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[IV]], 0 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C]], i32 0, i32 [[RDX]] -; CHECK-NEXT: br label %[[IF2_MERGE]] -; CHECK: [[IF2_MERGE]]: -; CHECK-NEXT: [[BLEND1:%.*]] = phi i32 [ [[SEL]], %[[IF3]] ], [ [[RDX]], %[[IF2]] ] -; CHECK-NEXT: br label %[[IF1_MERGE]] -; CHECK: [[IF1_MERGE]]: -; CHECK-NEXT: [[BLEND2:%.*]] = phi i32 [ [[BLEND1]], %[[IF2_MERGE]] ], [ [[RDX]], %[[IF1]] ] -; CHECK-NEXT: br label %[[LOOP_LATCH]] -; CHECK: [[LOOP_LATCH]]: -; CHECK-NEXT: [[RDX_NEXT]] = phi i32 [ [[BLEND2]], %[[IF1_MERGE]] ], [ [[RDX]], %[[LOOP_HEADER]] ] -; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 -; CHECK-NEXT: [[EC:%.*]] = icmp slt i32 [[IV_NEXT]], [[N]] -; CHECK-NEXT: br i1 [[EC]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP5:![0-9]+]] -; CHECK: [[EXIT]]: -; CHECK-NEXT: [[RDX_NEXT_LCSSA:%.*]] = phi i32 [ [[RDX_NEXT]], %[[LOOP_LATCH]] ], [ 0, %[[MIDDLE_BLOCK]] ] -; CHECK-NEXT: ret i32 [[RDX_NEXT_LCSSA]] -; -entry: - br label %loop.header - -loop.header: - %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ] - %rdx = phi i32 [ 0, %entry ], [ %rdx.next, %loop.latch ] - br i1 %c0, label %loop.latch, label %if1 - -if1: - br i1 %c1, label %if1.merge, label %if2 - -if2: - br i1 %c2, label %if2.merge, label %if3 - -if3: - %c = icmp eq i32 %iv, 0 - %sel = select i1 %c, i32 0, i32 %rdx - br label %if2.merge - -if2.merge: - %blend1 = phi i32 [ %sel, %if3 ], [ %rdx, %if2 ] - br label %if1.merge - -if1.merge: - %blend2 = phi i32 [ %blend1, %if2.merge ], [ %rdx, %if1 ] - br label %loop.latch - -loop.latch: - %rdx.next = phi i32 [ %blend2, %if1.merge ], [ %rdx, %loop.header ] - %iv.next = add i32 %iv, 1 - %ec = icmp slt i32 %iv.next, %n - br i1 %ec, label %loop.header, label %exit - -exit: - ret i32 %rdx.next -} - -define i32 @anyof_diamond_blend_chain(i1 %c0, i1 %c1, i32 %n) { -; CHECK-LABEL: define i32 @anyof_diamond_blend_chain( -; CHECK-SAME: i1 [[C0:%.*]], i1 [[C1:%.*]], i32 [[N:%.*]]) { -; CHECK-NEXT: [[ENTRY:.*]]: -; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N]], i32 1) -; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[SMAX]], 4 -; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] -; CHECK: [[VECTOR_PH]]: -; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[SMAX]], 4 -; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[SMAX]], [[N_MOD_VF]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C0]], i64 0 -; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i1> poison, i1 [[C1]], i64 0 -; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT1]], <4 x i1> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] -; CHECK: [[VECTOR_BODY]]: -; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] -; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] -; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i1> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP3:%.*]], %[[VECTOR_BODY]] ] -; CHECK-NEXT: [[TMP0:%.*]] = icmp eq <4 x i32> [[VEC_IND]], zeroinitializer -; CHECK-NEXT: [[TMP1:%.*]] = select <4 x i1> [[BROADCAST_SPLAT]], <4 x i1> [[TMP0]], <4 x i1> zeroinitializer -; CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[BROADCAST_SPLAT2]], <4 x i1> [[TMP1]], <4 x i1> zeroinitializer -; CHECK-NEXT: [[TMP3]] = or <4 x i1> [[VEC_PHI]], [[TMP2]] -; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 -; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], splat (i32 4) -; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] -; CHECK: [[MIDDLE_BLOCK]]: -; CHECK-NEXT: [[TMP5:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP3]]) -; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[SMAX]], [[N_VEC]] -; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] -; CHECK: [[SCALAR_PH]]: -; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] -; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ 0, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] -; CHECK-NEXT: br label %[[LOOP_HEADER:.*]] -; CHECK: [[LOOP_HEADER]]: -; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] -; CHECK-NEXT: [[RDX:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[RDX_NEXT:%.*]], %[[LOOP_LATCH]] ] -; CHECK-NEXT: br i1 [[C0]], label %[[IF_TRUE:.*]], label %[[IF_FALSE:.*]] -; CHECK: [[IF_TRUE]]: -; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[IV]], 0 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C]], i32 0, i32 [[RDX]] -; CHECK-NEXT: br label %[[MERGE:.*]] -; CHECK: [[IF_FALSE]]: -; CHECK-NEXT: br label %[[MERGE]] -; CHECK: [[MERGE]]: -; CHECK-NEXT: [[BLEND:%.*]] = phi i32 [ [[SEL]], %[[IF_TRUE]] ], [ [[RDX]], %[[IF_FALSE]] ] -; CHECK-NEXT: br i1 [[C1]], label %[[P1:.*]], label %[[P2:.*]] -; CHECK: [[P1]]: -; CHECK-NEXT: br label %[[FINAL_MERGE:.*]] -; CHECK: [[P2]]: -; CHECK-NEXT: br label %[[FINAL_MERGE]] -; CHECK: [[FINAL_MERGE]]: -; CHECK-NEXT: [[RDX_NEXT]] = phi i32 [ [[BLEND]], %[[P1]] ], [ [[RDX]], %[[P2]] ] -; CHECK-NEXT: br label %[[LOOP_LATCH]] -; CHECK: [[LOOP_LATCH]]: -; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 -; CHECK-NEXT: [[EC:%.*]] = icmp slt i32 [[IV_NEXT]], [[N]] -; CHECK-NEXT: br i1 [[EC]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP7:![0-9]+]] -; CHECK: [[EXIT]]: -; CHECK-NEXT: [[RDX_NEXT_LCSSA:%.*]] = phi i32 [ [[RDX_NEXT]], %[[LOOP_LATCH]] ], [ 0, %[[MIDDLE_BLOCK]] ] -; CHECK-NEXT: ret i32 [[RDX_NEXT_LCSSA]] -; -entry: - br label %loop.header - -loop.header: - %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ] - %rdx = phi i32 [ 0, %entry ], [ %rdx.next, %loop.latch ] - br i1 %c0, label %if.true, label %if.false - -if.true: - %c = icmp eq i32 %iv, 0 - %sel = select i1 %c, i32 0, i32 %rdx - br label %merge - -if.false: - br label %merge - -merge: - %blend = phi i32 [ %sel, %if.true ], [ %rdx, %if.false ] - br i1 %c1, label %p1, label %p2 - -p1: - br label %final.merge - -p2: - br label %final.merge - -final.merge: - %rdx.next = phi i32 [ %blend, %p1 ], [ %rdx, %p2 ] - br label %loop.latch - -loop.latch: - %iv.next = add i32 %iv, 1 - %ec = icmp slt i32 %iv.next, %n - br i1 %ec, label %loop.header, label %exit - -exit: - ret i32 %rdx.next -} _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
