================
@@ -202,34 +202,37 @@ void Rematerializer::updateLiveIntervals() {
});
// Update intervals for unrematerializable operands.
- for (unsigned MOIdx : getUnrematableOprds(RegIdx)) {
- Register UnrematReg = UpdateReg.DefMI->getOperand(MOIdx).getReg();
+ for (const auto &[UnrematReg, Mask] : getUnrematableDeps(RegIdx)) {
if (!SeenUnrematRegs.insert(UnrematReg).second)
continue;
LIS.removeInterval(UnrematReg);
LIS.createAndComputeVirtRegInterval(UnrematReg);
LLVM_DEBUG(
- dbgs() << " Re-computed interval for register "
- << printReg(UnrematReg, &TRI,
- UpdateReg.DefMI->getOperand(MOIdx).getSubReg(),
- &MRI)
- << '\n');
+ dbgs() << " Re-computed interval for unrematerializable register "
+ << printReg(UnrematReg, &TRI, 0, &MRI) << " with lanemask "
+ << Mask << '\n');
}
}
LISUpdates.clear();
}
bool Rematerializer::isMOIdenticalAtUses(MachineOperand &MO,
ArrayRef<SlotIndex> Uses) const {
- if (Uses.empty())
- return true;
- Register Reg = MO.getReg();
unsigned SubIdx = MO.getSubReg();
LaneBitmask Mask = SubIdx ? TRI.getSubRegIndexLaneMask(SubIdx)
- : MRI.getMaxLaneMaskForVReg(Reg);
+ : MRI.getMaxLaneMaskForVReg(MO.getReg());
+ return isRegIdenticalAtUses(
+ MO.getReg(), Mask,
+ LIS.getInstructionIndex(*MO.getParent()).getRegSlot(true), Uses);
+}
+
+bool Rematerializer::isRegIdenticalAtUses(Register Reg, LaneBitmask Mask,
+ SlotIndex RefSlot,
+ ArrayRef<SlotIndex> Uses) const {
+ if (Uses.empty())
----------------
lucas-rami wrote:
It doesn't happen currently but felt semantically correct to me. I will remove
the check as the rest of the function produces the same result anyway.
https://github.com/llvm/llvm-project/pull/197579
_______________________________________________
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
