================
@@ -0,0 +1,171 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 
UTC_ARGS: --function-signature --check-attributes --check-globals 
--prefix-filecheck-ir-name true
+; RUN: opt -mtriple=nvptx-unknown-unknown -aa-pipeline=basic-aa 
-passes=attributor -attributor-manifest-internal -attributor-annotate-decl-cs 
-S < %s | FileCheck %s --check-prefix=CHECK
+
+@_ZZ27mcasi_digit_counters_kernelE14shared_storage = internal addrspace(3) 
global [256 x i32] undef, align 4
+
+; Function Attrs: convergent mustprogress noinline norecurse nounwind
+;.
+; CHECK: @_ZZ27mcasi_digit_counters_kernelE14shared_storage = internal 
addrspace(3) global [256 x i32] undef, align 4
+;.
+define ptx_kernel void @mcasi_digit_counters_kernel(ptr nofree noundef 
writeonly captures(none) %arg, ptr nofree noundef readonly captures(none) 
%arg1, i32 noundef %arg2) #0 {
+; CHECK: Function Attrs: convergent mustprogress noinline norecurse nounwind
+; CHECK-LABEL: define {{[^@]+}}@mcasi_digit_counters_kernel
+; CHECK-SAME: (ptr nofree noundef writeonly captures(none) [[ARG:%.*]], ptr 
nofree noundef readonly captures(none) [[ARG1:%.*]], i32 noundef [[ARG2:%.*]]) 
#[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    [[I:%.*]] = alloca [4 x ptr], align 8
+; CHECK-NEXT:    [[I3:%.*]] = tail call noundef i32 
@llvm.nvvm.read.ptx.sreg.tid.x() #[[ATTR4:[0-9]+]]
+; CHECK-NEXT:    [[I4:%.*]] = icmp samesign ult i32 [[I3]], 256
+; CHECK-NEXT:    br i1 [[I4]], label [[BB5:%.*]], label [[BB10:%.*]]
+; CHECK:       bb5:
+; CHECK-NEXT:    [[I6:%.*]] = zext nneg i32 [[I3]] to i64
+; CHECK-NEXT:    [[I7:%.*]] = getelementptr inbounds nuw [4 x i8], ptr 
[[ARG1]], i64 [[I6]]
+; CHECK-NEXT:    [[TMP0:%.*]] = addrspacecast ptr [[I7]] to ptr addrspace(1)
+; CHECK-NEXT:    [[I8:%.*]] = load i32, ptr addrspace(1) [[TMP0]], align 4
+; CHECK-NEXT:    [[I9:%.*]] = getelementptr inbounds nuw [4 x i8], ptr 
addrspacecast (ptr addrspace(3) 
@_ZZ27mcasi_digit_counters_kernelE14shared_storage to ptr), i64 [[I6]]
+; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr [[I9]] to ptr addrspace(3)
+; CHECK-NEXT:    store i32 [[I8]], ptr addrspace(3) [[TMP1]], align 4
+; CHECK-NEXT:    br label [[BB10]]
+; CHECK:       bb10:
+; CHECK-NEXT:    tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 
noundef 0)
+; CHECK-NEXT:    call void @llvm.lifetime.start.p0(ptr noalias nofree noundef 
nonnull align 8 captures(none) dereferenceable(28) [[I]]) #[[ATTR5:[0-9]+]]
+; CHECK-NEXT:    [[I11:%.*]] = shl nuw nsw i32 [[I3]], 2
+; CHECK-NEXT:    [[I12:%.*]] = and i32 [[I11]], 124
+; CHECK-NEXT:    [[I13:%.*]] = zext nneg i32 [[I12]] to i64
+; CHECK-NEXT:    [[I14:%.*]] = getelementptr inbounds nuw [4 x i8], ptr 
addrspacecast (ptr addrspace(3) 
@_ZZ27mcasi_digit_counters_kernelE14shared_storage to ptr), i64 [[I13]]
+; CHECK-NEXT:    [[TMP2:%.*]] = addrspacecast ptr [[I]] to ptr addrspace(5)
+; CHECK-NEXT:    store ptr [[I14]], ptr addrspace(5) [[TMP2]], align 8
+; CHECK-NEXT:    [[I15:%.*]] = getelementptr inbounds nuw i8, ptr [[I14]], i64 
4
+; CHECK-NEXT:    [[I16:%.*]] = getelementptr inbounds nuw i8, ptr [[I]], i64 8
+; CHECK-NEXT:    [[TMP3:%.*]] = addrspacecast ptr [[I16]] to ptr addrspace(5)
+; CHECK-NEXT:    store ptr [[I15]], ptr addrspace(5) [[TMP3]], align 8
+; CHECK-NEXT:    [[I17:%.*]] = getelementptr inbounds nuw i8, ptr [[I14]], i64 
8
+; CHECK-NEXT:    [[I18:%.*]] = getelementptr inbounds nuw i8, ptr [[I]], i64 16
+; CHECK-NEXT:    [[TMP4:%.*]] = addrspacecast ptr [[I18]] to ptr addrspace(5)
+; CHECK-NEXT:    store ptr [[I17]], ptr addrspace(5) [[TMP4]], align 8
+; CHECK-NEXT:    [[I19:%.*]] = getelementptr inbounds nuw i8, ptr [[I14]], i64 
12
+; CHECK-NEXT:    [[I20:%.*]] = getelementptr inbounds nuw i8, ptr [[I]], i64 24
+; CHECK-NEXT:    [[TMP5:%.*]] = addrspacecast ptr [[I20]] to ptr addrspace(5)
+; CHECK-NEXT:    store ptr [[I19]], ptr addrspace(5) [[TMP5]], align 8
+; CHECK-NEXT:    [[I21:%.*]] = and i32 [[ARG2]], 3
+; CHECK-NEXT:    [[I22:%.*]] = zext nneg i32 [[I21]] to i64
+; CHECK-NEXT:    [[I23:%.*]] = getelementptr inbounds nuw [8 x i8], ptr [[I]], 
i64 [[I22]]
+; CHECK-NEXT:    [[TMP6:%.*]] = addrspacecast ptr [[I23]] to ptr addrspace(5)
+; CHECK-NEXT:    [[I24:%.*]] = load ptr, ptr addrspace(5) [[TMP6]], align 8
+; CHECK-NEXT:    [[TMP7:%.*]] = addrspacecast ptr [[I24]] to ptr addrspace(3)
+; CHECK-NEXT:    [[I25:%.*]] = load i32, ptr addrspace(3) [[TMP7]], align 4, 
!invariant.load [[META15:![0-9]+]]
+; CHECK-NEXT:    [[I26:%.*]] = add i32 [[I25]], [[I21]]
+; CHECK-NEXT:    [[I27:%.*]] = zext nneg i32 [[I3]] to i64
+; CHECK-NEXT:    [[I28:%.*]] = getelementptr inbounds nuw [4 x i8], ptr 
[[ARG]], i64 [[I27]]
+; CHECK-NEXT:    [[TMP8:%.*]] = addrspacecast ptr [[I28]] to ptr addrspace(1)
+; CHECK-NEXT:    store i32 [[I26]], ptr addrspace(1) [[TMP8]], align 4
+; CHECK-NEXT:    call void @llvm.lifetime.end.p0(ptr noalias nofree noundef 
nonnull align 8 captures(none) dereferenceable(28) [[I]]) #[[ATTR5]]
+; CHECK-NEXT:    ret void
+;
+bb:
+  %i = alloca [4 x ptr], align 8
+  %i3 = tail call noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+  %i4 = icmp samesign ult i32 %i3, 256
+  br i1 %i4, label %bb5, label %bb10
+
+bb5:                                              ; preds = %bb
+  %i6 = zext nneg i32 %i3 to i64
+  %i7 = getelementptr inbounds nuw [4 x i8], ptr %arg1, i64 %i6
+  %i8 = load i32, ptr %i7, align 4
+  %i9 = getelementptr inbounds nuw [4 x i8], ptr addrspacecast (ptr 
addrspace(3) @_ZZ27mcasi_digit_counters_kernelE14shared_storage to ptr), i64 %i6
+  store i32 %i8, ptr %i9, align 4
+  br label %bb10
+
+bb10:                                             ; preds = %bb5, %bb
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0)
+  call void @llvm.lifetime.start.p0(ptr nonnull %i) #4
+  %i11 = shl nuw nsw i32 %i3, 2
+  %i12 = and i32 %i11, 124
+  %i13 = zext nneg i32 %i12 to i64
+  %i14 = getelementptr inbounds nuw [4 x i8], ptr addrspacecast (ptr 
addrspace(3) @_ZZ27mcasi_digit_counters_kernelE14shared_storage to ptr), i64 
%i13
+  store ptr %i14, ptr %i, align 8
+  %i15 = getelementptr inbounds nuw i8, ptr %i14, i64 4
+  %i16 = getelementptr inbounds nuw i8, ptr %i, i64 8
+  store ptr %i15, ptr %i16, align 8
+  %i17 = getelementptr inbounds nuw i8, ptr %i14, i64 8
+  %i18 = getelementptr inbounds nuw i8, ptr %i, i64 16
+  store ptr %i17, ptr %i18, align 8
+  %i19 = getelementptr inbounds nuw i8, ptr %i14, i64 12
+  %i20 = getelementptr inbounds nuw i8, ptr %i, i64 24
+  store ptr %i19, ptr %i20, align 8
+  %i21 = and i32 %arg2, 3
+  %i22 = zext nneg i32 %i21 to i64
+  %i23 = getelementptr inbounds nuw [8 x i8], ptr %i, i64 %i22
+  %i24 = load ptr, ptr %i23, align 8
+  %i25 = load i32, ptr %i24, align 4
+  %i26 = add i32 %i25, %i21
+  %i27 = zext nneg i32 %i3 to i64
+  %i28 = getelementptr inbounds nuw [4 x i8], ptr %arg, i64 %i27
+  store i32 %i26, ptr %i28, align 4
+  call void @llvm.lifetime.end.p0(ptr nonnull %i) #4
+  ret void
+}
+
+; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: 
readwrite)
+declare void @llvm.lifetime.start.p0(ptr captures(none)) #1
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier.cta.sync.aligned.all(i32) #2
+
+; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: 
readwrite)
+declare void @llvm.lifetime.end.p0(ptr captures(none)) #1
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn 
memory(none)
+declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x() #3
+
+attributes #0 = { convergent mustprogress noinline norecurse nounwind 
"frame-pointer"="all" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="sm_120a" 
"target-features"="+ptx91,+sm_120a" "uniform-work-group-size" }
+attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: 
readwrite) }
+attributes #2 = { convergent nocallback nounwind }
+attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn 
memory(none) }
+attributes #4 = { nounwind }
+
+!llvm.module.flags = !{!0, !1, !2, !3, !4}
+!llvm.dbg.cu = !{!5}
+!llvm.ident = !{!7, !8}
+!llvm.errno.tbaa = !{!9}
+!nvvmir.version = !{!14}
+
+!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 13, i32 1]}
----------------
shiltian wrote:

yeah, this test needs to be further trimmed.

https://github.com/llvm/llvm-project/pull/207866
_______________________________________________
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

Reply via email to