llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-loongarch Author: hev (heiher) <details> <summary>Changes</summary> The patch adds a late optimization pass that replaces conditional branches that can be statically evaluated with an unconditinal branch. This pass is inspired by RISC-V's RISCVLateBranchOpt pass. --- Patch is 31.24 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/216261.diff 12 Files Affected: - (modified) llvm/lib/Target/LoongArch/CMakeLists.txt (+1) - (modified) llvm/lib/Target/LoongArch/LoongArch.h (+2) - (modified) llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp (+14) - (added) llvm/lib/Target/LoongArch/LoongArchLateBranchOpt.cpp (+122) - (modified) llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp (+8) - (modified) llvm/test/CodeGen/LoongArch/branch-opt.ll (+43-308) - (modified) llvm/test/CodeGen/LoongArch/jr-without-ra.ll (+32-58) - (modified) llvm/test/CodeGen/LoongArch/opt-pipeline.ll (+4) - (modified) llvm/test/CodeGen/LoongArch/pr215935.ll (-10) - (modified) llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/loongarch_generated_funcs.ll.generated.expected (+7-13) - (modified) llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/loongarch_generated_funcs.ll.nogenerated.expected (+7-13) - (modified) llvm/utils/gn/secondary/llvm/lib/Target/LoongArch/BUILD.gn (+1) ``````````diff diff --git a/llvm/lib/Target/LoongArch/CMakeLists.txt b/llvm/lib/Target/LoongArch/CMakeLists.txt index c856173ca89de..084544ff4112d 100644 --- a/llvm/lib/Target/LoongArch/CMakeLists.txt +++ b/llvm/lib/Target/LoongArch/CMakeLists.txt @@ -24,6 +24,7 @@ add_llvm_target(LoongArchCodeGen LoongArchInstrInfo.cpp LoongArchISelDAGToDAG.cpp LoongArchISelLowering.cpp + LoongArchLateBranchOpt.cpp LoongArchMCInstLower.cpp LoongArchMergeBaseOffset.cpp LoongArchOptWInstrs.cpp diff --git a/llvm/lib/Target/LoongArch/LoongArch.h b/llvm/lib/Target/LoongArch/LoongArch.h index e5b3083348792..6762f91df72d9 100644 --- a/llvm/lib/Target/LoongArch/LoongArch.h +++ b/llvm/lib/Target/LoongArch/LoongArch.h @@ -41,6 +41,7 @@ FunctionPass *createLoongArchMergeBaseOffsetOptPass(); FunctionPass *createLoongArchOptWInstrsPass(); FunctionPass *createLoongArchPreRAExpandPseudoPass(); FunctionPass *createLoongArchExpandPseudoPass(); +FunctionPass *createLoongArchLateBranchOptPass(); void initializeLoongArchAsmPrinterPass(PassRegistry &); void initializeLoongArchDAGToDAGISelLegacyPass(PassRegistry &); void initializeLoongArchDeadRegisterDefinitionsPass(PassRegistry &); @@ -49,6 +50,7 @@ void initializeLoongArchMergeBaseOffsetOptPass(PassRegistry &); void initializeLoongArchOptWInstrsPass(PassRegistry &); void initializeLoongArchPreRAExpandPseudoPass(PassRegistry &); void initializeLoongArchExpandPseudoPass(PassRegistry &); +void initializeLoongArchLateBranchOptPass(PassRegistry &); } // end namespace llvm #endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCH_H diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp index 92e1feb07ae50..55f779a612909 100644 --- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp +++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp @@ -7314,6 +7314,20 @@ static bool combine_CC(SDValue &LHS, SDValue &RHS, SDValue &CC, const SDLoc &DL, } } + // Fold (C1, C2, cond) -> (0, 0, seteq/setne) + if (isa<ConstantSDNode>(LHS) && isa<ConstantSDNode>(RHS)) { + const LoongArchTargetLowering *TLI = Subtarget.getTargetLowering(); + EVT VT = LHS.getValueType(); + EVT SetCCResVT = + TLI->getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); + if (SDValue Folded = DAG.FoldSetCC(SetCCResVT, LHS, RHS, CCVal, DL)) { + LHS = DAG.getConstant(0, DL, VT); + RHS = DAG.getConstant(0, DL, VT); + CC = DAG.getCondCode(!isNullConstant(Folded) ? ISD::SETEQ : ISD::SETNE); + return true; + } + } + return false; } diff --git a/llvm/lib/Target/LoongArch/LoongArchLateBranchOpt.cpp b/llvm/lib/Target/LoongArch/LoongArchLateBranchOpt.cpp new file mode 100644 index 0000000000000..988b0427cfae2 --- /dev/null +++ b/llvm/lib/Target/LoongArch/LoongArchLateBranchOpt.cpp @@ -0,0 +1,122 @@ +//===-- LoongArchLateBranchOpt.cpp - Late Stage Branch Optimization +//-----------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// +/// This file provides LoongArch specific target optimizations, currently it's +/// limited to convert conditional branches into unconditional branches when +/// the condition can be statically evaluated. +/// +//===----------------------------------------------------------------------===// + +#include "LoongArchInstrInfo.h" +#include "LoongArchSubtarget.h" + +using namespace llvm; + +#define LOONGARCH_LATE_BRANCH_OPT_NAME "LoongArch Late Branch Optimisation Pass" + +namespace { + +struct LoongArchLateBranchOpt : public MachineFunctionPass { + static char ID; + + LoongArchLateBranchOpt() : MachineFunctionPass(ID) {} + + StringRef getPassName() const override { + return LOONGARCH_LATE_BRANCH_OPT_NAME; + } + + void getAnalysisUsage(AnalysisUsage &AU) const override { + MachineFunctionPass::getAnalysisUsage(AU); + } + + bool runOnMachineFunction(MachineFunction &Fn) override; + +private: + bool runOnBasicBlock(MachineBasicBlock &MBB) const; + + const LoongArchInstrInfo *TII = nullptr; +}; +} // namespace + +char LoongArchLateBranchOpt::ID = 0; +INITIALIZE_PASS(LoongArchLateBranchOpt, "loongarch-late-branch-opt", + LOONGARCH_LATE_BRANCH_OPT_NAME, false, false) + +bool LoongArchLateBranchOpt::runOnBasicBlock(MachineBasicBlock &MBB) const { + MachineBasicBlock *TBB, *FBB; + SmallVector<MachineOperand, 4> Cond; + if (TII->analyzeBranch(MBB, TBB, FBB, Cond, /*AllowModify=*/false)) + return false; + + if (!TBB || Cond.size() < 1) + return false; + + // Try and convert a conditional branch that can be evaluated statically + // into an unconditional branch. + unsigned Opc = Cond[0].getImm(); + MachineBasicBlock *Folded; + switch (Opc) { + case LoongArch::BEQZ: + case LoongArch::BNEZ: + if (Cond.size() < 2 || !Cond[1].isReg() || + Cond[1].getReg() != LoongArch::R0) + return false; + Folded = (Opc == LoongArch::BEQZ) ? TBB : FBB; + break; + case LoongArch::BEQ: + case LoongArch::BNE: + if (Cond.size() < 3 || !Cond[1].isReg() || !Cond[2].isReg() || + Cond[1].getReg() != Cond[2].getReg()) + return false; + Folded = (Opc == LoongArch::BEQ) ? TBB : FBB; + break; + default: + return false; + } + + // At this point, its legal to optimize. + TII->removeBranch(MBB); + + // Only need to insert a branch if we're not falling through. + if (Folded) { + DebugLoc DL = MBB.findBranchDebugLoc(); + TII->insertBranch(MBB, Folded, nullptr, {}, DL); + } + + // Update the successors. Remove them all and add back the correct one. + while (!MBB.succ_empty()) + MBB.removeSuccessor(MBB.succ_end() - 1); + + // If it's a fallthrough, we need to figure out where MBB is going. + if (!Folded) { + MachineFunction::iterator Fallthrough = ++MBB.getIterator(); + if (Fallthrough != MBB.getParent()->end()) + MBB.addSuccessor(&*Fallthrough); + } else + MBB.addSuccessor(Folded); + + return true; +} + +bool LoongArchLateBranchOpt::runOnMachineFunction(MachineFunction &Fn) { + if (skipFunction(Fn.getFunction())) + return false; + + auto &ST = Fn.getSubtarget<LoongArchSubtarget>(); + TII = ST.getInstrInfo(); + + bool Changed = false; + for (MachineBasicBlock &MBB : Fn) + Changed |= runOnBasicBlock(MBB); + return Changed; +} + +FunctionPass *llvm::createLoongArchLateBranchOptPass() { + return new LoongArchLateBranchOpt(); +} diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp index fb0053b7077e4..027650f92a08a 100644 --- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp +++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp @@ -44,6 +44,7 @@ LLVMInitializeLoongArchTarget() { initializeLoongArchExpandPseudoPass(*PR); initializeLoongArchDAGToDAGISelLegacyPass(*PR); initializeLoongArchExpandAtomicPseudoPass(*PR); + initializeLoongArchLateBranchOptPass(*PR); } static cl::opt<bool> EnableLoongArchDeadRegisterElimination( @@ -165,6 +166,7 @@ class LoongArchPassConfig : public TargetPassConfig { void addPreRegAlloc() override; bool addRegAssignAndRewriteFast() override; bool addRegAssignAndRewriteOptimized() override; + void addMachineLateOptimization() override; }; } // end namespace @@ -239,3 +241,9 @@ bool LoongArchPassConfig::addRegAssignAndRewriteOptimized() { addPass(createLoongArchDeadRegisterDefinitionsPass()); return TargetPassConfig::addRegAssignAndRewriteOptimized(); } + +void LoongArchPassConfig::addMachineLateOptimization() { + if (TM->getOptLevel() != CodeGenOptLevel::None) + addPass(createLoongArchLateBranchOptPass()); + TargetPassConfig::addMachineLateOptimization(); +} diff --git a/llvm/test/CodeGen/LoongArch/branch-opt.ll b/llvm/test/CodeGen/LoongArch/branch-opt.ll index 2a7712afb44af..fa4b558a58d55 100644 --- a/llvm/test/CodeGen/LoongArch/branch-opt.ll +++ b/llvm/test/CodeGen/LoongArch/branch-opt.ll @@ -1,38 +1,13 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc --mtriple=loongarch32 -mattr=-32s,+d --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA32R -; RUN: llc --mtriple=loongarch32 -mattr=+32s,+d --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA32S -; RUN: llc --mtriple=loongarch64 -mattr=+d --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA64 +; RUN: llc --mtriple=loongarch32 -mattr=-32s,+d --verify-machineinstrs < %s | FileCheck %s +; RUN: llc --mtriple=loongarch32 -mattr=+32s,+d --verify-machineinstrs < %s | FileCheck %s +; RUN: llc --mtriple=loongarch64 -mattr=+d --verify-machineinstrs < %s | FileCheck %s define i32 @br_eq() nounwind { -; LA32R-LABEL: br_eq: -; LA32R: # %bb.0: # %entry -; LA32R-NEXT: beq $zero, $zero, .LBB0_2 -; LA32R-NEXT: # %bb.1: -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: ret -; LA32R-NEXT: .LBB0_2: -; LA32R-NEXT: move $a0, $zero -; LA32R-NEXT: ret -; -; LA32S-LABEL: br_eq: -; LA32S: # %bb.0: # %entry -; LA32S-NEXT: beqz $zero, .LBB0_2 -; LA32S-NEXT: # %bb.1: -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: ret -; LA32S-NEXT: .LBB0_2: -; LA32S-NEXT: move $a0, $zero -; LA32S-NEXT: ret -; -; LA64-LABEL: br_eq: -; LA64: # %bb.0: # %entry -; LA64-NEXT: beqz $zero, .LBB0_2 -; LA64-NEXT: # %bb.1: -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: ret -; LA64-NEXT: .LBB0_2: -; LA64-NEXT: move $a0, $zero -; LA64-NEXT: ret +; CHECK-LABEL: br_eq: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: move $a0, $zero +; CHECK-NEXT: ret entry: %1 = icmp eq i32 0, 0 br i1 %1, label %2, label %3 @@ -43,38 +18,10 @@ entry: } define i32 @br_ne() nounwind { -; LA32R-LABEL: br_ne: -; LA32R: # %bb.0: # %entry -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: beq $a0, $zero, .LBB1_2 -; LA32R-NEXT: # %bb.1: -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: ret -; LA32R-NEXT: .LBB1_2: -; LA32R-NEXT: move $a0, $zero -; LA32R-NEXT: ret -; -; LA32S-LABEL: br_ne: -; LA32S: # %bb.0: # %entry -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: beqz $a0, .LBB1_2 -; LA32S-NEXT: # %bb.1: -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: ret -; LA32S-NEXT: .LBB1_2: -; LA32S-NEXT: move $a0, $zero -; LA32S-NEXT: ret -; -; LA64-LABEL: br_ne: -; LA64: # %bb.0: # %entry -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: beqz $a0, .LBB1_2 -; LA64-NEXT: # %bb.1: -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: ret -; LA64-NEXT: .LBB1_2: -; LA64-NEXT: move $a0, $zero -; LA64-NEXT: ret +; CHECK-LABEL: br_ne: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: ori $a0, $zero, 1 +; CHECK-NEXT: ret entry: %1 = icmp ne i32 0, 1 br i1 %1, label %3, label %2 @@ -85,35 +32,10 @@ entry: } define i32 @br_lt() nounwind { -; LA32R-LABEL: br_lt: -; LA32R: # %bb.0: # %entry -; LA32R-NEXT: beq $zero, $zero, .LBB2_2 -; LA32R-NEXT: # %bb.1: -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: ret -; LA32R-NEXT: .LBB2_2: -; LA32R-NEXT: move $a0, $zero -; LA32R-NEXT: ret -; -; LA32S-LABEL: br_lt: -; LA32S: # %bb.0: # %entry -; LA32S-NEXT: beqz $zero, .LBB2_2 -; LA32S-NEXT: # %bb.1: -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: ret -; LA32S-NEXT: .LBB2_2: -; LA32S-NEXT: move $a0, $zero -; LA32S-NEXT: ret -; -; LA64-LABEL: br_lt: -; LA64: # %bb.0: # %entry -; LA64-NEXT: beqz $zero, .LBB2_2 -; LA64-NEXT: # %bb.1: -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: ret -; LA64-NEXT: .LBB2_2: -; LA64-NEXT: move $a0, $zero -; LA64-NEXT: ret +; CHECK-LABEL: br_lt: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: move $a0, $zero +; CHECK-NEXT: ret entry: %1 = icmp slt i32 0, 1 br i1 %1, label %2, label %3 @@ -124,35 +46,10 @@ entry: } define i32 @br_le() nounwind { -; LA32R-LABEL: br_le: -; LA32R: # %bb.0: # %entry -; LA32R-NEXT: bne $zero, $zero, .LBB3_2 -; LA32R-NEXT: # %bb.1: -; LA32R-NEXT: move $a0, $zero -; LA32R-NEXT: ret -; LA32R-NEXT: .LBB3_2: -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: ret -; -; LA32S-LABEL: br_le: -; LA32S: # %bb.0: # %entry -; LA32S-NEXT: bnez $zero, .LBB3_2 -; LA32S-NEXT: # %bb.1: -; LA32S-NEXT: move $a0, $zero -; LA32S-NEXT: ret -; LA32S-NEXT: .LBB3_2: -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: ret -; -; LA64-LABEL: br_le: -; LA64: # %bb.0: # %entry -; LA64-NEXT: bnez $zero, .LBB3_2 -; LA64-NEXT: # %bb.1: -; LA64-NEXT: move $a0, $zero -; LA64-NEXT: ret -; LA64-NEXT: .LBB3_2: -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: ret +; CHECK-LABEL: br_le: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: move $a0, $zero +; CHECK-NEXT: ret entry: %1 = icmp sle i32 0, 1 br i1 %1, label %2, label %3 @@ -163,38 +60,10 @@ entry: } define i32 @br_gt() nounwind { -; LA32R-LABEL: br_gt: -; LA32R: # %bb.0: # %entry -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: beq $a0, $zero, .LBB4_2 -; LA32R-NEXT: # %bb.1: -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: ret -; LA32R-NEXT: .LBB4_2: -; LA32R-NEXT: move $a0, $zero -; LA32R-NEXT: ret -; -; LA32S-LABEL: br_gt: -; LA32S: # %bb.0: # %entry -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: beqz $a0, .LBB4_2 -; LA32S-NEXT: # %bb.1: -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: ret -; LA32S-NEXT: .LBB4_2: -; LA32S-NEXT: move $a0, $zero -; LA32S-NEXT: ret -; -; LA64-LABEL: br_gt: -; LA64: # %bb.0: # %entry -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: beqz $a0, .LBB4_2 -; LA64-NEXT: # %bb.1: -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: ret -; LA64-NEXT: .LBB4_2: -; LA64-NEXT: move $a0, $zero -; LA64-NEXT: ret +; CHECK-LABEL: br_gt: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: ori $a0, $zero, 1 +; CHECK-NEXT: ret entry: %1 = icmp sgt i32 1, 0 br i1 %1, label %3, label %2 @@ -205,38 +74,10 @@ entry: } define i32 @br_ge() nounwind { -; LA32R-LABEL: br_ge: -; LA32R: # %bb.0: # %entry -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: beq $a0, $zero, .LBB5_2 -; LA32R-NEXT: # %bb.1: -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: ret -; LA32R-NEXT: .LBB5_2: -; LA32R-NEXT: move $a0, $zero -; LA32R-NEXT: ret -; -; LA32S-LABEL: br_ge: -; LA32S: # %bb.0: # %entry -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: beqz $a0, .LBB5_2 -; LA32S-NEXT: # %bb.1: -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: ret -; LA32S-NEXT: .LBB5_2: -; LA32S-NEXT: move $a0, $zero -; LA32S-NEXT: ret -; -; LA64-LABEL: br_ge: -; LA64: # %bb.0: # %entry -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: beqz $a0, .LBB5_2 -; LA64-NEXT: # %bb.1: -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: ret -; LA64-NEXT: .LBB5_2: -; LA64-NEXT: move $a0, $zero -; LA64-NEXT: ret +; CHECK-LABEL: br_ge: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: ori $a0, $zero, 1 +; CHECK-NEXT: ret entry: %1 = icmp sge i32 1, 0 br i1 %1, label %3, label %2 @@ -247,35 +88,10 @@ entry: } define i32 @br_ltu() nounwind { -; LA32R-LABEL: br_ltu: -; LA32R: # %bb.0: # %entry -; LA32R-NEXT: bne $zero, $zero, .LBB6_2 -; LA32R-NEXT: # %bb.1: -; LA32R-NEXT: move $a0, $zero -; LA32R-NEXT: ret -; LA32R-NEXT: .LBB6_2: -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: ret -; -; LA32S-LABEL: br_ltu: -; LA32S: # %bb.0: # %entry -; LA32S-NEXT: bnez $zero, .LBB6_2 -; LA32S-NEXT: # %bb.1: -; LA32S-NEXT: move $a0, $zero -; LA32S-NEXT: ret -; LA32S-NEXT: .LBB6_2: -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: ret -; -; LA64-LABEL: br_ltu: -; LA64: # %bb.0: # %entry -; LA64-NEXT: bnez $zero, .LBB6_2 -; LA64-NEXT: # %bb.1: -; LA64-NEXT: move $a0, $zero -; LA64-NEXT: ret -; LA64-NEXT: .LBB6_2: -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: ret +; CHECK-LABEL: br_ltu: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: move $a0, $zero +; CHECK-NEXT: ret entry: %1 = icmp ult i32 0, 1 br i1 %1, label %2, label %3 @@ -286,35 +102,10 @@ entry: } define i32 @br_leu() nounwind { -; LA32R-LABEL: br_leu: -; LA32R: # %bb.0: # %entry -; LA32R-NEXT: bne $zero, $zero, .LBB7_2 -; LA32R-NEXT: # %bb.1: -; LA32R-NEXT: move $a0, $zero -; LA32R-NEXT: ret -; LA32R-NEXT: .LBB7_2: -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: ret -; -; LA32S-LABEL: br_leu: -; LA32S: # %bb.0: # %entry -; LA32S-NEXT: bnez $zero, .LBB7_2 -; LA32S-NEXT: # %bb.1: -; LA32S-NEXT: move $a0, $zero -; LA32S-NEXT: ret -; LA32S-NEXT: .LBB7_2: -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: ret -; -; LA64-LABEL: br_leu: -; LA64: # %bb.0: # %entry -; LA64-NEXT: bnez $zero, .LBB7_2 -; LA64-NEXT: # %bb.1: -; LA64-NEXT: move $a0, $zero -; LA64-NEXT: ret -; LA64-NEXT: .LBB7_2: -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: ret +; CHECK-LABEL: br_leu: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: move $a0, $zero +; CHECK-NEXT: ret entry: %1 = icmp ule i32 0, 1 br i1 %1, label %2, label %3 @@ -325,38 +116,10 @@ entry: } define i32 @br_gtu() nounwind { -; LA32R-LABEL: br_gtu: -; LA32R: # %bb.0: # %entry -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: beq $a0, $zero, .LBB8_2 -; LA32R-NEXT: # %bb.1: -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: ret -; LA32R-NEXT: .LBB8_2: -; LA32R-NEXT: move $a0, $zero -; LA32R-NEXT: ret -; -; LA32S-LABEL: br_gtu: -; LA32S: # %bb.0: # %entry -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: beqz $a0, .LBB8_2 -; LA32S-NEXT: # %bb.1: -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: ret -; LA32S-NEXT: .LBB8_2: -; LA32S-NEXT: move $a0, $zero -; LA32S-NEXT: ret -; -; LA64-LABEL: br_gtu: -; LA64: # %bb.0: # %entry -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: beqz $a0, .LBB8_2 -; LA64-NEXT: # %bb.1: -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: ret -; LA64-NEXT: .LBB8_2: -; LA64-NEXT: move $a0, $zero -; LA64-NEXT: ret +; CHECK-LABEL: br_gtu: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: ori $a0, $zero, 1 +; CHECK-NEXT: ret entry: %1 = icmp ugt i32 1, 0 br i1 %1, label %3, label %2 @@ -366,38 +129,10 @@ entry: ret i32 1 } define i32 @br_geu() nounwind { -; LA32R-LABEL: br_geu: -; LA32R: # %bb.0: # %entry -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: beq $a0, $zero, .LBB9_2 -; LA32R-NEXT: # %bb.1: -; LA32R-NEXT: ori $a0, $zero, 1 -; LA32R-NEXT: ret -; LA32R-NEXT: .LBB9_2: -; LA32R-NEXT: move $a0, $zero -; LA32R-NEXT: ret -; -; LA32S-LABEL: br_geu: -; LA32S: # %bb.0: # %entry -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: beqz $a0, .LBB9_2 -; LA32S-NEXT: # %bb.1: -; LA32S-NEXT: ori $a0, $zero, 1 -; LA32S-NEXT: ret -; LA32S-NEXT: .LBB9_2: -; LA32S-NEXT: move $a0, $zero -; LA32S-NEXT: ret -; -; LA64-LABEL: br_geu: -; LA64: # %bb.0: # %entry -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: beqz $a0, .LBB9_2 -; LA64-NEXT: # %bb.1: -; LA64-NEXT: ori $a0, $zero, 1 -; LA64-NEXT: ret -; LA64-NEXT: .LBB9_2: -; LA64-NEXT: move $a0, $zero -; LA64-NEXT: ret +; CHECK-LABEL: br_geu: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: ori $a0, $zero, 1 +; CHECK-NEXT: ret entry: %1 = icmp uge i32 1, 0 br i1 %1, label %3, label %2 diff --git a/llvm/test/CodeGen/LoongArch/jr-without-ra.ll b/llvm/test/CodeGen/LoongArch/jr-without-ra.ll index 96c9e7523f642..814e2f2c70287 100644 --- a/llvm/test/CodeGen/LoongArch/jr-without-ra.ll +++ b/llvm/test/CodeGen/LoongArch/jr-without-ra.ll @@ -38,23 +38,31 @@ define void @jr_without_ra(ptr %rtwdev, ptr %chan, ptr %h2c, i8 %.pre, i1 %cmp.i ; CHECK-NEXT: alsl.d $a6, $a6, $s2, 4 ; CHECK-NEXT: pcalau12i $s2, %pc_hi20(.LJTI0_0) ; CHECK-NEXT: addi.d $s2, $s2, %pc_lo12(.LJTI0_0) -; CHECK-NEXT: ori $s3, $zero, 1 -; CHECK-NEXT: ori $s4, $zero, 50 +; CHECK-NEXT: ori $s3, $zero, 50 +; CHECK-NEXT: ori $s4, $zero, 1 ; CHECK-NEXT: ori $s5, $zero, 3 ; CHECK-NEXT: lu32i.d $s5, 262144 -; CHECK-NEXT: b .LBB0_4 +; CHECK-NEXT: b .LBB0_3 ; CHECK-NEXT: .p2align 4, , 16 -; CHECK-NEXT: .LBB0_1: # %sw.bb27.i.i -; CHECK-NEXT: # in Loop: He... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/216261 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
