================
@@ -6030,32 +6002,30 @@ class LLVM_ABI TargetLowering : public
TargetLoweringBase {
SmallVectorImpl<SDValue> &Results,
std::optional<unsigned> CallRetResNo = {}) const;
- /// Legalize a SETCC or VP_SETCC with given LHS and RHS and condition code CC
- /// on the current target. A VP_SETCC will additionally be given a Mask
- /// and/or EVL not equal to SDValue().
+ /// Legalize a SETCC with given LHS and RHS and condition code CC
+ /// on the current target.
///
/// If the SETCC has been legalized using AND / OR, then the legalized node
/// will be stored in LHS. RHS and CC will be set to SDValue(). NeedInvert
- /// will be set to false. This will also hold if the VP_SETCC has been
- /// legalized using VP_AND / VP_OR.
+ /// will be set to false.
///
- /// If the SETCC / VP_SETCC has been legalized by using
+ /// If the SETCC has been legalized by using
/// getSetCCSwappedOperands(), then the values of LHS and RHS will be
/// swapped, CC will be set to the new condition, and NeedInvert will be set
/// to false.
///
- /// If the SETCC / VP_SETCC has been legalized using the inverse condcode,
+ /// If the SETCC has been legalized using the inverse condcode,
----------------
topperc wrote:
Reflow this comment
https://github.com/llvm/llvm-project/pull/217866
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