================
@@ -2255,6 +2288,23 @@ bool AMDGPUOperand::isLiteralImm(MVT type) const {
return canLosslesslyConvertToFPType(FPLiteral, ExpectedType);
}
+bool AMDGPUOperand::isRegClassByHwMode(unsigned RCByHwModeIdx) const {
+ if (!isRegKind())
+ return false;
+ int16_t RCID = AsmParser->getRegClassByHwMode(RCByHwModeIdx);
----------------
vpykhtin wrote:
Right, it's all about misaligned diagnostics.
https://github.com/llvm/llvm-project/pull/221988
_______________________________________________
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits