================
@@ -4173,6 +4177,144 @@ bool SIRegisterInfo::getRegAllocationHints(Register
VirtReg,
}
}
+bool SIRegisterInfo::shouldApplyAntiHints(
+ const MachineFunction &MF, unsigned NumAllocatedVGPRs,
+ unsigned &MaxVGPRsForCurrentOccupancy) const {
+
+ const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
+ unsigned DynamicVGPRBlockSize = MFI->getDynamicVGPRBlockSize();
+ unsigned RecordedMaxOccupancy = MFI->getOccupancy();
+ unsigned CurrentOccupancy =
+ ST.getOccupancyWithNumVGPRs(NumAllocatedVGPRs, DynamicVGPRBlockSize);
+ MaxVGPRsForCurrentOccupancy =
+ ST.getMaxNumVGPRs(CurrentOccupancy, DynamicVGPRBlockSize);
+
+ LLVM_DEBUG(dbgs() << "anti-hints: " << NumAllocatedVGPRs
+ << " VGPRs allocated, RecordedMaxOccupancy "
+ << RecordedMaxOccupancy << ", current occupancy "
+ << CurrentOccupancy << '\n');
+
+ // If we are already at lowest occupancy, then there is no need to protect
+ // against occupancy regression.
+ if (CurrentOccupancy == 1)
+ return true;
+
+ // Do not apply anti-hints if we are reaching close to the VGPR budget. For
+ // recorded max occupancy, the 80% cutoff is a conservative: anti-hints are
+ // disabled early enough that later registers still have headroom to stay at
+ // recorded max occupancy. For current occupancy, the 95% cutoff margin is
+ // used to not apply anti-hints close to the limit of the current occupancy
+ // budget.
+ unsigned MaxVGPRsCutOffForRecordedMaxOccupancy =
+ (ST.getMaxNumVGPRs(RecordedMaxOccupancy, DynamicVGPRBlockSize) * 80) /
+ 100;
+ unsigned MaxVGPRsCutOffForCurrentOccupancy =
+ (MaxVGPRsForCurrentOccupancy * 95) / 100;
+
+ if (NumAllocatedVGPRs >= MaxVGPRsCutOffForRecordedMaxOccupancy) {
+ LLVM_DEBUG(dbgs() << "anti-hints: not applied, at or above the "
+ << MaxVGPRsCutOffForRecordedMaxOccupancy
+ << " VGPR cutoff for RecordedMaxOccupancy\n");
+ return false;
+ }
+
+ if (NumAllocatedVGPRs >= MaxVGPRsCutOffForCurrentOccupancy) {
+ LLVM_DEBUG(dbgs() << "anti-hints: not applied, at or above the "
+ << MaxVGPRsCutOffForCurrentOccupancy
+ << " VGPR cutoff for current occupancy\n");
+ return false;
+ }
+
+ return true;
+}
+
+// Returns true if Reg fits within the current occupancy VGPR budget.
+bool SIRegisterInfo::isRegWithinOccupancyBudget(
+ MCPhysReg Reg, unsigned NumVGPRs, unsigned NumAGPRs,
+ unsigned MaxVGPRsForCurrentOccupancy) const {
+ const TargetRegisterClass *RC = getPhysRegBaseClass(Reg);
+
+ // No VGPR or AGPR usage.
+ if (!RC || !hasVectorRegisters(RC))
+ return true;
+
+ unsigned RegEndIndex =
+ getHWRegIndex(Reg) + divideCeil(getRegSizeInBits(*RC), 32);
+
+ unsigned MaxVGPR = NumVGPRs;
+ unsigned MaxAGPR = NumAGPRs;
+
+ if (isAGPRClass(RC))
+ MaxAGPR = std::max(MaxAGPR, RegEndIndex);
+ else
+ MaxVGPR = std::max(MaxVGPR, RegEndIndex);
+
+ return static_cast<unsigned>(
+ AMDGPU::getTotalNumVGPRs(ST.hasGFX90AInsts(), MaxAGPR, MaxVGPR))
<=
+ MaxVGPRsForCurrentOccupancy;
+}
+
+void SIRegisterInfo::filterAndSortForAntiHintedRegs(
+ Register VirtReg, MutableArrayRef<MCPhysReg> CustomOrder,
+ const BitVector &AntiHintedRegUnits, const MachineFunction &MF,
+ const LiveRegMatrix *Matrix, const RegisterClassInfo *RegClassInfo) const {
+
+ if (none_of(CustomOrder, [&](MCPhysReg Reg) {
+ return isAntiHintedReg(Reg, AntiHintedRegUnits);
+ }))
+ return;
+
+ const MachineRegisterInfo &MRI = MF.getRegInfo();
+ assert(hasVectorRegisters(MRI.getRegClass(VirtReg)) &&
+ "SGPR anti-hints are not handled");
+ unsigned NumVGPRs = 0;
+ unsigned NumAGPRs = 0;
+
+ assert(RegClassInfo && "RegClassInfo required to compute occupancy");
+ for (MCPhysReg Reg : RegClassInfo->getOrder(&AMDGPU::VGPR_32RegClass))
----------------
qcolombet wrote:
I'd put braces for both `for`s here.
I find it difficult to read otherwise
https://github.com/llvm/llvm-project/pull/218074
_______________________________________________
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
