https://github.com/arichardson created https://github.com/llvm/llvm-project/pull/225130
<!-- nspr:warning --> > [!WARNING] > ⚠️ **Part of a stacked PR.** Merge via `nspr land` or GitHub's **Merge > stack** (if merging a single PR via the web UI, click **Rebase stack** or run > `nspr sync` afterwards). <!-- /nspr:warning --> Previously, LTO::addRegularLTO() and IRLinker::run() called prependModuleInlineAsm() and appendModuleInlineAsm() with a plain string when synthesizing `.lto_discard` and imported `.symver` directives, creating a new GlobalAsmFragment with empty TargetCPU and TargetFeatures instead of preserving the existing module inline asm's properties. Copy the front fragment's Props so these synthesized directives are merged into the module's inline asm with the same target features. This commit was created with the help of AI tools >From 5beabb0797fe20ea16eccb8f444d04eaac7dc734 Mon Sep 17 00:00:00 2001 From: Alex Richardson <[email protected]> Date: Mon, 21 Sep 2026 08:59:09 -0700 Subject: [PATCH] [LTO] Preserve module inline asm target properties for .lto_discard and symvers Previously, LTO::addRegularLTO() and IRLinker::run() called prependModuleInlineAsm() and appendModuleInlineAsm() with a plain string when synthesizing `.lto_discard` and imported `.symver` directives, creating a new GlobalAsmFragment with empty TargetCPU and TargetFeatures instead of preserving the existing module inline asm's properties. Copy the front fragment's Props so these synthesized directives are merged into the module's inline asm with the same target features. This commit was created with the help of AI tools --- cross-project-tests/riscv/lto-inline-asm-abi.c | 13 +++++-------- llvm/lib/LTO/LTO.cpp | 2 +- llvm/lib/Linker/IRMover.cpp | 3 ++- llvm/test/LTO/RISCV/module-asm.ll | 5 +---- 4 files changed, 9 insertions(+), 14 deletions(-) diff --git a/cross-project-tests/riscv/lto-inline-asm-abi.c b/cross-project-tests/riscv/lto-inline-asm-abi.c index 3092708562686..76bb8568a3286 100644 --- a/cross-project-tests/riscv/lto-inline-asm-abi.c +++ b/cross-project-tests/riscv/lto-inline-asm-abi.c @@ -12,16 +12,13 @@ // RUN: llvm-objdump -d --show-all-symbols --no-show-raw-insn %t.so | FileCheck %s --check-prefix=DISASM // RUN: llvm-objdump -t %t.so | FileCheck %s --check-prefix=SYMS --implicit-check-not='\$x' // -/// TODO: ThinLTO fails because IRMover drops TargetTriple when importing the -/// module-level .symver inline asm into b.c's empty ThinLTO module, causing -/// RISC-V module inline asm in a.c and b.c to use the default lp64 ABI instead -/// of lp64d. // RUN: %clang --target=riscv64-linux-android -march=rv64gcv -O2 -flto=thin -c %t/a.c -o %t1.thin.o // RUN: %clang --target=riscv64-linux-android -march=rv64gcv -O2 -flto=thin -c %t/b.c -o %t2.thin.o -// RUN: not %clang --target=riscv64-linux-android -march=rv64gcv -O2 -flto=thin -shared -nostdlib -fuse-ld=lld -Wl,--version-script=%t/ver.ver %t1.thin.o %t2.thin.o -o %t.thin.so 2>&1 \ -// RUN: | FileCheck %s --check-prefix=THIN-ERR -// -// THIN-ERR: ld.lld: error: {{.*}}.lto.a.o: cannot link object files with different floating-point ABI +// RUN: %clang --target=riscv64-linux-android -march=rv64gcv -O2 -flto=thin -shared -nostdlib -fuse-ld=lld -Wl,--version-script=%t/ver.ver %t1.thin.o %t2.thin.o -o %t.thin.so 2>&1 \ +// RUN: | FileCheck %s --allow-empty --implicit-check-not="error:" --implicit-check-not="warning:" --implicit-check-not="note:" +// RUN: llvm-readobj --file-headers %t.thin.so | FileCheck %s --check-prefix=FLAGS +// RUN: llvm-objdump -d --show-all-symbols --no-show-raw-insn %t.thin.so | FileCheck %s --check-prefix=DISASM +// RUN: llvm-objdump -t %t.thin.so | FileCheck %s --check-prefix=SYMS --implicit-check-not='\$x' // // FLAGS: Flags [ (0x5) // FLAGS-NEXT: EF_RISCV_FLOAT_ABI_DOUBLE (0x4) diff --git a/llvm/lib/LTO/LTO.cpp b/llvm/lib/LTO/LTO.cpp index 4594c52fb5f6e..e307b7f1c16e8 100644 --- a/llvm/lib/LTO/LTO.cpp +++ b/llvm/lib/LTO/LTO.cpp @@ -1129,7 +1129,7 @@ LTO::addRegularLTO(InputFile &Input, ArrayRef<SymbolResolution> InputRes, NewIA += " " + llvm::join(NonPrevailingAsmSymbols, ", "); } NewIA += "\n"; - M.prependModuleInlineAsm(NewIA); + M.prependModuleInlineAsm({NewIA, M.getModuleInlineAsm().front().Props}); } assert(MsymI == MsymE); diff --git a/llvm/lib/Linker/IRMover.cpp b/llvm/lib/Linker/IRMover.cpp index 3b72b412d0b2e..080ba6d542f71 100644 --- a/llvm/lib/Linker/IRMover.cpp +++ b/llvm/lib/Linker/IRMover.cpp @@ -1576,7 +1576,8 @@ Error IRLinker::run() { S += Name; S += ", "; S += Alias; - DstM.appendModuleInlineAsm(std::string(S)); + DstM.appendModuleInlineAsm( + {std::string(S), SrcM->getModuleInlineAsm().front().Props}); } }); } diff --git a/llvm/test/LTO/RISCV/module-asm.ll b/llvm/test/LTO/RISCV/module-asm.ll index e213ec14a2a58..f27943f5457ac 100644 --- a/llvm/test/LTO/RISCV/module-asm.ll +++ b/llvm/test/LTO/RISCV/module-asm.ll @@ -7,11 +7,8 @@ ; NM: T func -;; TODO: LTO::addRegularLTO prepends ".lto_discard" without preserving the -;; existing module inline asm's TargetCPU and TargetFeatures. -; IR: module asm +; IR: module asm(target_features: "+d") ; IR-NEXT: ".lto_discard" -; IR-NEXT: module asm(target_features: "+d") ; IR-NEXT: ".globl func" ; IR-NEXT: "func:" ; IR-NEXT: "fld f0, 0(sp)" _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
