================
@@ -16,19 +16,23 @@
include "mlir/Pass/PassBase.td"
def AmdgpuEmulateAtomicsPass : Pass<"amdgpu-emulate-atomics"> {
- let summary = "Emulate atomic operations on chipsets that do not support
them";
+ let summary = "Emulate atomic operations the target does not support";
let description = [{
- This pass rewrites any AMDGPU-specific atomic operation that is not
supported
- on the given `chipset` into a compare-and-swap loop.
+ This pass rewrites any AMDGPU-specific atomic operation that the target
does
+ not support into a compare-and-swap loop.
}];
let dependentDialects = [
"cf::ControlFlowDialect",
"arith::ArithDialect",
"vector::VectorDialect"
];
- let options = [Option<"chipset", "chipset", "std::string",
- /*default=*/"\"gfx000\"",
- "Chipset that these operations will run on">];
+ let options = [
+ Option<"arch", "arch", "std::string",
+ /*default=*/"\"invalid\"",
+ "Target architecture, as in Clang, with optional target-ID
modifiers. New-style triples such as amdgpu9.42-amd-amdhsa are preferred, and
can be extended to a full target ID like
amdgpu9.42-amd-amdhsa--gfx942:xnack+:sramecc-. Bare chip names like gfx1250 or
gfx942:xnack- are also supported. Defaults to an invalid target so that one
must be given explicitly">,
----------------
joker-eph wrote:
This looks like a very long line that could be wrapped around.
https://github.com/llvm/llvm-project/pull/223563
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