https://github.com/lukel97 created https://github.com/llvm/llvm-project/pull/230056
x86 can't handle the implicit truncation of build_vector operands so the whilewr_8 test case crashes after expanding get_active_lane_mask (stemming from llvm.loop.dependence.war.mask). Fix it by explicitly truncating it. --- <sub>Stack created with <a href="https://github.com/github/gh-stack";>GitHub Stacks CLI</a> • <a href="https://gh.io/stacks-feedback";>Give Feedback 💬</a></sub> >From 0ad1fe514dc11371b8f23c18e989f5afa15c6902 Mon Sep 17 00:00:00 2001 From: Luke Lau <[email protected]> Date: Thu, 8 Oct 2026 11:41:21 +0100 Subject: [PATCH] [DAG] Explicitly truncate splat operand in get_active_lane_mask expansion x86 can't handle the implicit truncation of build_vector operands so the whilewr_8 test case crashes after expanding get_active_lane_mask (stemming from llvm.loop.dependence.war.mask). Fix it by explicitly truncating it. --- .../CodeGen/SelectionDAG/TargetLowering.cpp | 1 + llvm/test/CodeGen/X86/alias_mask.ll | 26 +++++++++++++++++++ 2 files changed, 27 insertions(+) create mode 100644 llvm/test/CodeGen/X86/alias_mask.ll diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 2bf97fb58908a..83de277e936ef 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -11279,6 +11279,7 @@ SDValue TargetLowering::expandGetActiveLaneMask(SDNode *N, DL, OpVT); End = DAG.getNode(ISD::USUBSAT, DL, OpVT, End, Start); End = DAG.getNode(ISD::UMIN, DL, OpVT, End, Max); + End = DAG.getZExtOrTrunc(End, DL, StepVector.getValueType()); // cmp <0, 1, 2, 3...>, End SDValue EndV = DAG.getSplat(StepVector.getValueType(), DL, End); diff --git a/llvm/test/CodeGen/X86/alias_mask.ll b/llvm/test/CodeGen/X86/alias_mask.ll new file mode 100644 index 0000000000000..c092643f80a8c --- /dev/null +++ b/llvm/test/CodeGen/X86/alias_mask.ll @@ -0,0 +1,26 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 +; RUN: llc -mtriple=x86_64 < %s | FileCheck %s + +define <16 x i1> @whilewr_8(i64 %a, i64 %b) { +; CHECK-LABEL: whilewr_8: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: subq %rdi, %rsi +; CHECK-NEXT: movq $-1, %rax +; CHECK-NEXT: cmovaq %rsi, %rax +; CHECK-NEXT: cmpq $255, %rax +; CHECK-NEXT: movl $255, %ecx +; CHECK-NEXT: cmovbq %rax, %rcx +; CHECK-NEXT: movd %ecx, %xmm0 +; CHECK-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] +; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7] +; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,0,1] +; CHECK-NEXT: movdqa {{.*#+}} xmm0 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15] +; CHECK-NEXT: pmaxub %xmm0, %xmm1 +; CHECK-NEXT: pcmpeqb %xmm0, %xmm1 +; CHECK-NEXT: pcmpeqd %xmm0, %xmm0 +; CHECK-NEXT: pxor %xmm1, %xmm0 +; CHECK-NEXT: retq +entry: + %0 = call <16 x i1> @llvm.loop.dependence.war.mask.v16i1.i64(i64 %a, i64 %b, i64 1) + ret <16 x i1> %0 +} _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
