https://llvm.org/bugs/show_bug.cgi?id=24474
Bug ID: 24474
Summary: [AArch64] Improve load/store optimizer to handle load
pairs with same dest register
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: normal
Priority: P
Component: Backend: AArch64
Assignee: mcros...@codeaurora.org
Reporter: mcros...@codeaurora.org
CC: bma...@codeaurora.org, gbe...@codeaurora.org,
ghofleh...@apple.com, james.mol...@arm.com,
junb...@codeaurora.org, llvm-bugs@lists.llvm.org,
ma...@braunis.de, mssim...@codeaurora.org
Classification: Unclassified
Currently, the AArch64 load/store optimizer fails to create load store pairs
when adjacent loads have the same destination register. If we have a free
register, we can allocate a register to remove this dependency.
In r241920, Matthias enhanced the ARM load/store optimization pass to use
LivePhysRegs to find free registers instead of the RegisterScavenger. We
should use LivePhysRegs in the AArch64 load/store optimizer as well.
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