https://llvm.org/bugs/show_bug.cgi?id=25909
Bug ID: 25909
Summary: [Polly] Schedule does not model irreducible control
flow
Product: Projects
Version: unspecified
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: Polly
Assignee: polly-...@googlegroups.com
Reporter: tob...@grosser.es
CC: llvm-bugs@lists.llvm.org
Classification: Unclassified
Created attachment 15507
--> https://llvm.org/bugs/attachment.cgi?id=15507&action=edit
Irredubicle control flow
For a test cast that contains irregular control flow with loops (attached)
we do not generate loop dimensions in the schedule:
Stmt_start_split
Domain :=
[p] -> { Stmt_start_split[] };
Schedule :=
[p] -> { Stmt_start_split[] -> [0] };
MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
[p] -> { Stmt_start_split[] -> MemRef_cmp[] };
Stmt_S1
Domain :=
[p] -> { Stmt_S1[] : p <= 0 };
Schedule :=
[p] -> { Stmt_S1[] -> [1] };
MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
[p] -> { Stmt_S1[] -> MemRef_A[0] };
Stmt_S2
Domain :=
[p] -> { Stmt_S2[] : p >= 1 };
Schedule :=
[p] -> { Stmt_S2[] -> [2] };
MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
[p] -> { Stmt_S2[] -> MemRef_A[0] };
This is likely to be wrong and we should probably just detect irregular control
flow and bail out if found.
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