https://llvm.org/bugs/show_bug.cgi?id=26953
Bug ID: 26953
Summary: Reverted r263303: widen error for
zero_extend_vector_inreg
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: X86
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
Created attachment 16042
--> https://llvm.org/bugs/attachment.cgi?id=16042&action=edit
Simplified reproduction of the bug generated from Halide test
Halide on x86 was seeing failures after r263303.
Failure can be reproduced just with the change in
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Attaching a bitcode test generated from the following Halide test.
Error:
llc foo.bc
WidenVectorResult #0: t39: v3i32 = zero_extend_vector_inreg t38
Do not know how to widen the result of this operator!
UNREACHABLE executed at
[...]/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:1998!
[...]
[Original halide test follows]
[
#include "Halide.h"
#include <iostream>
using namespace Halide;
int main(int argc, char **argv) {
ImageParam input(UInt(8), 1);
Var x("x");
Func f("widen");
f(x) = cast<float>(input(x));
f.vectorize(x, 3);
Target target = get_target_from_environment();
target.set_features({Target::NoBoundsQuery, Target::NoRuntime});
//simplified test:
f.compile_to_bitcode("foo.bc", { input }, "foo", target);
//test and Halide runtime
f.compile_to_bitcode("bar.bc", { input }, "bar",
parse_target_string("x86-64"));
}
]
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