https://llvm.org/bugs/show_bug.cgi?id=28466
Bug ID: 28466
Summary: regression of bit manipulation optimization for
certain bit positions
Product: clang
Version: 3.8
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: -New Bugs
Assignee: unassignedclangb...@nondot.org
Reporter: nowak-l...@tepeserwery.pl
CC: llvm-bugs@lists.llvm.org
Classification: Unclassified
f1 and f2 have the same meaning but produce different code - f2 is not
correctly optimized and this happens only with bits 7, 15 and 31.
3.7.1 didn't have this problem.
unsigned int f1(unsigned int v) {
unsigned int r = (v & 0x80u) ? v : (v | 0x80u);
return r;
}
unsigned int f2(unsigned int v) {
unsigned int r;
if (v & 0x80u) {
r = v;
} else {
r = v | 0x80u;
}
return r;
}
unsigned int f3(unsigned int v) {
unsigned int r;
if (v & 0x40u) {
r = v;
} else {
r = v | 0x40u;
}
return r;
}
f1(unsigned int): # @f1(unsigned int)
orl $128, %edi
movl %edi, %eax
f2(unsigned int): # @f2(unsigned int)
movl %edi, %eax
orl $128, %eax
testb %dil, %dil
cmovsl %edi, %eax
f3(unsigned int): # @f3(unsigned int)
orl $64, %edi
movl %edi, %eax
--
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