https://llvm.org/bugs/show_bug.cgi?id=28672

Sanjay Patel <spatel+l...@rotateright.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED

--- Comment #3 from Sanjay Patel <spatel+l...@rotateright.com> ---
I'm marking this as fixed with:
https://reviews.llvm.org/rL282209

...because that gets rid of the urem in InstCombine.

There are a couple of potential follow-up bugs:

1. As noted, we can extend this transform even for non-constant divisors if we
can prove that the MSB (the sign bit) is set.

2. The backend doesn't seem to recognize negated constants:

ARM:
@ BB#0:                                 @ %entry
    ldr    r2, .LCPI0_0
    ldr    r3, .LCPI0_1
    add    r1, r0, #1
    cmp    r1, r3
    addhs    r1, r0, r2
    mov    r0, r1
    bx    lr
    .p2align    2
@ BB#1:
.LCPI0_0:
    .long    294397890               @ 0x118c27c2
.LCPI0_1:
    .long    4000569407              @ 0xee73d83f

x86:
    leal    1(%rdi), %ecx
    leal    294397890(%rdi), %eax
    cmpl    $-294397889, %ecx       ## imm = 0xEE73D83F
    cmovbl    %ecx, %eax
    retq

-- 
You are receiving this mail because:
You are on the CC list for the bug.
_______________________________________________
llvm-bugs mailing list
llvm-bugs@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs

Reply via email to