https://llvm.org/bugs/show_bug.cgi?id=31777
Bug ID: 31777
Summary: Union store codegen is silly
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Common Code Generator Code
Assignee: unassignedb...@nondot.org
Reporter: llvm-bugzi...@jfbastien.com
CC: llvm-bugs@lists.llvm.org
Classification: Unclassified
Consider this code:
#include <inttypes.h>
#include <string.h>
union U {
uint64_t i;
uint16_t s;
};
void foo(U* u) {
u->i = 0;
u->s = 42;
}
void bar(U* u) {
memset(u, 0, sizeof(U));
u->s = 42;
}
void baz(U* u) {
u->s = 42;
}
Let's ignore that foo could ignore the zero stores (because i isn't the active
member after the store to s): the codegen for this is pretty suboptimal
(https://godbolt.org/g/yS10Ki). The user's intent was to zero out padding bits,
and in many architectures you only need one store to do so (with, in some
cases, one materialization of the value).
x86-64:
foo(U*): # @foo(U*)
movq $0, (%rdi)
movw $42, (%rdi)
retq
bar(U*): # @bar(U*)
movq $0, (%rdi)
movw $42, (%rdi)
retq
baz(U*): # @baz(U*)
movw $42, (%rdi)
retq
ARMv8:
foo(U*):
mov r1, #0
str r1, [r0]
str r1, [r0, #4]
mov r1, #42
strh r1, [r0]
bx lr
bar(U*):
mov r1, #0
str r1, [r0]
str r1, [r0, #4]
mov r1, #42
strh r1, [r0]
bx lr
baz(U*):
mov r1, #42
strh r1, [r0]
bx lr
I'd expect foo and bar to look like what GCC 7 trunk does:
foo(U*):
movq $42, (%rdi)
ret
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