https://bugs.llvm.org/show_bug.cgi?id=34550

            Bug ID: 34550
           Summary: Superregs are not automatically inferred into the
                    callee saved regs list
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Common Code Generator Code
          Assignee: unassignedb...@nondot.org
          Reporter: pauls...@linux.vnet.ibm.com
                CC: llvm-bugs@lists.llvm.org

Although the SystemZ backend adds e.g. %R6 and %R7 to the CalleeSavedRegs list,
it is still needed to add %R6Q (the 128 bit super register of exactly those two
registers) to the list explicitly. This should not be necessary, since both the
subregs are already in the list.

Adding only the 128-bit regs gives unexpected results, see discussion:
http://lists.llvm.org/pipermail/llvm-dev/2017-August/116570.html

-- 
You are receiving this mail because:
You are on the CC list for the bug.
_______________________________________________
llvm-bugs mailing list
llvm-bugs@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs

Reply via email to