https://bugs.llvm.org/show_bug.cgi?id=34558
Bug ID: 34558
Summary: use SDNodeFlags to enable reciprocal square root
transform
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Common Code Generator Code
Assignee: unassignedb...@nondot.org
Reporter: spatel+l...@rotateright.com
CC: llvm-bugs@lists.llvm.org
Given IR with fast-math-flags, those attributes should be passed on to the
corresponding FP nodes in the DAG:
define float @fast_recip_sqrt(float %x) {
%y = call fast float @llvm.sqrt.f32(float %x)
%z = fdiv fast float 1.0, %y
ret float %z
}
declare float @llvm.sqrt.f32(float) nounwind readonly
-------------------------------------------------------------------------------
For x86, this should trigger a reciprocal square root estimate optimization:
rsqrtss %xmm0, %xmm1
mulss %xmm1, %xmm0
mulss %xmm1, %xmm0
addss LCPI0_0(%rip), %xmm0
mulss LCPI0_1(%rip), %xmm1
mulss %xmm1, %xmm0
retq
There are currently 2 problems:
1. We don't apply FMF to intrinsics ( https://reviews.llvm.org/D37686 proposes
to fix this), so the sqrt node isn't marked with any relaxed FP properties.
2. The code in DAGCombiner::visitFDIV() doesn't check flags on nodes.
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