https://bugs.llvm.org/show_bug.cgi?id=36355
Bug ID: 36355
Summary: [AMDGPU][MC] v_cvt_f32 with SDWA disassembly
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: unassignedb...@nondot.org
Reporter: tcorr...@amd.com
CC: llvm-bugs@lists.llvm.org
Some v_cvt_f32 instructions using SDWA that were compiled by another compiler
fail to disassemble using llvm-mc.
The corresponding instructions do assemble but to a different encoding (which
does then disassemble) which may indicate an incorrect encoding?
e.g.
v_cvt_f32_f16 v6, v6 src0_sel: WORD_1 // 7E0C16F9 00050606
v_cvt_f32_u32 v18, v14 src0_sel: BYTE_0 // 7E240CF9 0000060E
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